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mb/lenovo/x60: Remove PCI reset code from romstage 

Commit bf264e94 (i945:) adds a PCI reset to the romstage, and commit
bc8613ec (Fix i945 based boards) fixes that to use the correct
delay of 200 ms. This code was then copied over, when adding support for
the Lenovo X60.

The reset was related to the shipped crypto card on the Roda RK886EX and
Kontron 986LCD-M, so is not needed on the Lenovo X60. So remove it.

TEST=Build and boot on Lenovo X60t.
Change-Id: Ia37d9f0ecf5655531616edb20b53757d5d47b42f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/17703
Tested-by: build bot (Jenkins)
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Paul Menzel 2016-12-03 09:54:28 +01:00 committed by Martin Roth
parent a4464140f9
commit 7676730b9c
1 changed files with 0 additions and 5 deletions
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5
src/mainboard/lenovo/x60/romstage.c
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@ -219,11 +219,6 @@ void mainboard_romstage_entry(unsigned long bist)
if (bist == 0) if (bist == 0)
enable_lapic(); enable_lapic();
/* Force PCIRST# */
pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR);
udelay(200 * 1000);
pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, 0);
/* Enable GPIOs */ /* Enable GPIOs */
pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIOBASE, DEFAULT_GPIOBASE | 1); pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIOBASE, DEFAULT_GPIOBASE | 1);
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x4c, 0x10); /* 0x4c == GC */ pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x4c, 0x10); /* 0x4c == GC */