mainboard/google/poppy: Provide baseboard and variant concepts

In order to be able to share code across different poppy variants,
provide the concept of baseboard and variants. New directory layout:

variants/baseboard - code
variants/baseboard/include/baseboard - headers
variants/poppy - code
variants/poppy/include/variant - headers

New boards would then add themselves under their board name within
"variants" directory.

This is purely an organizational change.

BUG=b:37375693

Change-Id: If6c1c5f479cfffe768abf27495d379744104e2dc
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19322
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2017-04-13 14:15:56 -07:00 committed by Furquan Shaikh
parent 3189ea6dd1
commit 76c392d294
16 changed files with 88 additions and 16 deletions

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@ -18,6 +18,10 @@ config BOARD_GOOGLE_BASEBOARD_POPPY
if BOARD_GOOGLE_BASEBOARD_POPPY
config DEVICETREE
string
default "variants/baseboard/devicetree.cb"
config DRIVER_TPM_SPI_BUS
default 0x1
@ -59,6 +63,10 @@ config POPPY_USE_SPI_TPM
select SPI_TPM
select TPM2
config VARIANT_DIR
string
default "poppy" if BOARD_GOOGLE_POPPY
config VBOOT
select EC_GOOGLE_CHROMEEC_SWITCHES
select VBOOT_LID_SWITCH

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@ -30,3 +30,9 @@ ramstage-y += mainboard.c
ramstage-y += ramstage.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
subdirs-y += variants/baseboard
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
subdirs-y += variants/$(VARIANT_DIR)
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include

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@ -16,7 +16,7 @@
#include <bootblock_common.h>
#include <soc/gpio.h>
#include "gpio.h"
#include <variant/gpio.h>
static void early_config_gpio(void)
{

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@ -21,7 +21,7 @@
#include <tpm.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "gpio.h"
#include <variant/gpio.h>
#if ENV_RAMSTAGE
#include <boot/coreboot_tables.h>

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@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
#include "ec.h"
#include "gpio.h"
#include <variant/ec.h>
#include <variant/gpio.h>
DefinitionBlock(
"dsdt.aml",
@ -67,6 +67,6 @@ DefinitionBlock(
Scope (\_SB)
{
/* Dynamic Platform Thermal Framework */
#include "acpi/dptf.asl"
#include <variant/acpi/dptf.asl>
}
}

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@ -16,7 +16,7 @@
#include <arch/acpi.h>
#include <ec/google/chromeec/ec.h>
#include "ec.h"
#include <variant/ec.h>
void mainboard_ec_init(void)
{

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@ -15,7 +15,7 @@
#include <soc/ramstage.h>
#include "gpio.h"
#include <variant/gpio.h>
void mainboard_silicon_init_params(FSP_SIL_UPD *params)
{

View File

@ -17,7 +17,7 @@
#include <ec/google/chromeec/smm.h>
#include <soc/smm.h>
#include "ec.h"
#include <variant/ec.h>
void mainboard_smi_espi_handler(void)
{

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@ -23,7 +23,7 @@
#include <soc/romstage.h>
#include <string.h>
#include "../gpio.h"
#include <variant/gpio.h>
#include "spd.h"
static void mainboard_print_spd_info(uint8_t spd[])

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@ -13,13 +13,13 @@
* GNU General Public License for more details.
*/
#ifndef __MAINBOARD_EC_H__
#define __MAINBOARD_EC_H__
#ifndef __BASEBOARD_EC_H__
#define __BASEBOARD_EC_H__
#include <ec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include "gpio.h"
#include <variant/gpio.h>
#define MAINBOARD_EC_SCI_EVENTS \
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\

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@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
#ifndef __MAINBOARD_GPIO_H__
#define __MAINBOARD_GPIO_H__
#ifndef __BASEBOARD_GPIO_H__
#define __BASEBOARD_GPIO_H__
#include <soc/gpe.h>
#include <soc/gpio.h>
@ -396,6 +396,6 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_GPI_APIC_INVERT(GPP_E0, NONE, PLTRST),
};
#endif
#endif /* __ACPI__ */
#endif
#endif /* BASEBOARD_GPIO_H */

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@ -0,0 +1,16 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2017 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <baseboard/acpi/dptf.asl>

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@ -0,0 +1,21 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2017 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __MAINBOARD_EC_H__
#define __MAINBOARD_EC_H__
#include <baseboard/ec.h>
#endif /* __MAINBOARD_EC_H__ */

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@ -0,0 +1,21 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2017 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#ifndef __MAINBOARD_GPIO_H__
#define __MAINBOARD_GPIO_H__
#include <baseboard/gpio.h>
#endif /* __MAINBOARD_GPIO_H__ */