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Make i945/raminit.c:fsbclk() return u16 rather than int 

This is needed for Gentoo gcc-4.1.2 to build the i945 code. A warning is
thrown because the comparison in the last hunk is between u16 and -1 and
can never be true.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Peter Stuge 2010-10-01 10:02:33 +00:00 committed by Patrick Georgi
parent 6f56ad2d2e
commit 76d914391c
1 changed files with 5 additions and 5 deletions
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10
src/northbridge/intel/i945/raminit.c
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@ -103,7 +103,7 @@ static int memclk(void)
}
#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
static int fsbclk(void)
static u16 fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
case 0: return 400;
@ -111,10 +111,10 @@ static int fsbclk(void)
case 3: return 667;
default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
}
return -1;
return 0xffff;
}
#elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
static int fsbclk(void)
static u16 fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
case 0: return 1066;
@ -122,7 +122,7 @@ static int fsbclk(void)
case 2: return 800;
default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
}
return -1;
return 0xffff;
}
#endif
@ -1929,7 +1929,7 @@ static void sdram_program_pll_settings(struct sys_info *sysinfo)
MCHBAR32(PLLMON) = 0x80800000;
sysinfo->fsb_frequency = fsbclk();
if (sysinfo->fsb_frequency == -1)
if (sysinfo->fsb_frequency == 0xffff)
die("Unsupported FSB speed");
/* Program CPCTL according to FSB speed */