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mb/google/brox: Generate RAM IDs for two modules 

Add the support LP5 RAM parts for brox:
1. HYNIX LPDDR5 6400 2GB H9JCNNNBK3MLYR-N6E
2. MICRON LPDDR5 6400 4GB MT62F1G32D4DR-031 WT:B

DRAM Part Name                  ID to assign
H9JCNNNBK3MLYR-N6E              0 (0000)
MT62F1G32D4DR-031 WT:B          1 (0001)

BUG=b:311450057
BRANCH=None
TEST=Run part_id_gen tool without any errors
Change-Id: Ib17f26a310435e37088191594863a645aa751440
Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79392
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Ivy Jian 2023-12-04 11:04:18 +08:00 committed by Shelley Chen
parent 903454e7b8
commit 76e499319b
3 changed files with 6 additions and 1 deletions
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3
src/mainboard/google/brox/variants/brox/memory/Makefile.inc
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@ -4,4 +4,5 @@
# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brox/variants/brox/memory src/mainboard/google/brox/variants/brox/memory/mem_parts_used.txt # ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brox/variants/brox/memory src/mainboard/google/brox/variants/brox/memory/mem_parts_used.txt
SPD_SOURCES = SPD_SOURCES =
SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT62F512M32D2DR-031 WT:B SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E
SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 1(0b0001) Parts = MT62F1G32D4DR-031 WT:B

2
src/mainboard/google/brox/variants/brox/memory/dram_id.generated.txt
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@ -5,3 +5,5 @@
DRAM Part Name ID to assign DRAM Part Name ID to assign
MT62F512M32D2DR-031 WT:B 0 (0000) MT62F512M32D2DR-031 WT:B 0 (0000)
H9JCNNNBK3MLYR-N6E 0 (0000)
MT62F1G32D4DR-031 WT:B 1 (0001)

2
src/mainboard/google/brox/variants/brox/memory/mem_parts_used.txt
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@ -1 +1,3 @@
MT62F512M32D2DR-031 WT:B MT62F512M32D2DR-031 WT:B
H9JCNNNBK3MLYR-N6E
MT62F1G32D4DR-031 WT:B