cpu/amd/model_fxx: transition away from device_t
Replace the use of the old device_t definition inside cpu/amd/model_fxx. Change-Id: Iac7571956ed2fb927a6b8cc88514e533f40490d0 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16437 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -342,7 +342,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
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static u32 is_core0_started(u32 nodeid)
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{
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u32 htic;
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device_t device;
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pci_devfn_t device;
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device = PCI_DEV(0, 0x18 + nodeid, 0);
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htic = pci_read_config32(device, HT_INIT_CONTROL);
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htic &= HTIC_INIT_Detect;
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@ -76,8 +76,9 @@ static inline int is_e0_later_in_bsp(int nodeid)
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if (nodeid == 0) { // we don't need to do that for node 0 in core0/node0
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return !is_cpu_pre_e0();
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}
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// d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0
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device_t dev;
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pci_devfn_t dev;
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dev = PCI_DEV(0, 0x18+nodeid,2);
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val_old = pci_read_config32(dev, 0x80);
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val = val_old;
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@ -85,6 +86,7 @@ static inline int is_e0_later_in_bsp(int nodeid)
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pci_write_config32(dev, 0x80, val);
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val = pci_read_config32(dev, 0x80);
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e0_later = !!(val & (1<<3));
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if (e0_later) { // pre_e0 bit 3 always be 0 and can not be changed
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pci_write_config32(dev, 0x80, val_old); // restore it
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}
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@ -95,7 +97,7 @@ static inline int is_e0_later_in_bsp(int nodeid)
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static inline int is_cpu_f0_in_bsp(int nodeid)
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{
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uint32_t dword;
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device_t dev;
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pci_devfn_t dev;
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if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT))
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return 0;
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dev = PCI_DEV(0, 0x18+nodeid, 3);
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@ -106,7 +108,8 @@ static inline int is_cpu_f0_in_bsp(int nodeid)
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static inline int is_cpu_pre_f2_in_bsp(int nodeid)
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{
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uint32_t dword;
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device_t dev;
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pci_devfn_t dev;
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if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT))
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return 1;
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dev = PCI_DEV(0, 0x18+nodeid, 3);
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