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cpu/amd/model_fxx: transition away from device_t

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Replace the use of the old device_t definition inside
cpu/amd/model_fxx.

Change-Id: Iac7571956ed2fb927a6b8cc88514e533f40490d0
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16437
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Antonello Dettori 2016-09-03 10:45:33 +02:00 committed by Martin Roth
parent 97c460a2d1
commit 76e8c00be6
2 changed files with 7 additions and 4 deletions
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2
src/cpu/amd/model_fxx/init_cpus.c
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@ -342,7 +342,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
static u32 is_core0_started(u32 nodeid) static u32 is_core0_started(u32 nodeid)
{ {
u32 htic; u32 htic;
device_t device; pci_devfn_t device;
device = PCI_DEV(0, 0x18 + nodeid, 0); device = PCI_DEV(0, 0x18 + nodeid, 0);
htic = pci_read_config32(device, HT_INIT_CONTROL); htic = pci_read_config32(device, HT_INIT_CONTROL);
htic &= HTIC_INIT_Detect; htic &= HTIC_INIT_Detect;

9
src/include/cpu/amd/model_fxx_rev.h
View file

@ -76,8 +76,9 @@ static inline int is_e0_later_in_bsp(int nodeid)
if (nodeid == 0) { // we don't need to do that for node 0 in core0/node0 if (nodeid == 0) { // we don't need to do that for node 0 in core0/node0
return !is_cpu_pre_e0(); return !is_cpu_pre_e0();
} }
// d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0 // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0
device_t dev; pci_devfn_t dev;
dev = PCI_DEV(0, 0x18+nodeid,2); dev = PCI_DEV(0, 0x18+nodeid,2);
val_old = pci_read_config32(dev, 0x80); val_old = pci_read_config32(dev, 0x80);
val = val_old; val = val_old;
@ -85,6 +86,7 @@ static inline int is_e0_later_in_bsp(int nodeid)
pci_write_config32(dev, 0x80, val); pci_write_config32(dev, 0x80, val);
val = pci_read_config32(dev, 0x80); val = pci_read_config32(dev, 0x80);
e0_later = !!(val & (1<<3)); e0_later = !!(val & (1<<3));
if (e0_later) { // pre_e0 bit 3 always be 0 and can not be changed if (e0_later) { // pre_e0 bit 3 always be 0 and can not be changed
pci_write_config32(dev, 0x80, val_old); // restore it pci_write_config32(dev, 0x80, val_old); // restore it
} }
@ -95,7 +97,7 @@ static inline int is_e0_later_in_bsp(int nodeid)
static inline int is_cpu_f0_in_bsp(int nodeid) static inline int is_cpu_f0_in_bsp(int nodeid)
{ {
uint32_t dword; uint32_t dword;
device_t dev; pci_devfn_t dev;
if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)) if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT))
return 0; return 0;
dev = PCI_DEV(0, 0x18+nodeid, 3); dev = PCI_DEV(0, 0x18+nodeid, 3);
@ -106,7 +108,8 @@ static inline int is_cpu_f0_in_bsp(int nodeid)
static inline int is_cpu_pre_f2_in_bsp(int nodeid) static inline int is_cpu_pre_f2_in_bsp(int nodeid)
{ {
uint32_t dword; uint32_t dword;
device_t dev; pci_devfn_t dev;
if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)) if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT))
return 1; return 1;
dev = PCI_DEV(0, 0x18+nodeid, 3); dev = PCI_DEV(0, 0x18+nodeid, 3);