From 771b1aefa3415eb644bfa030772f00b2178b368a Mon Sep 17 00:00:00 2001 From: Greg Watson Date: Sat, 17 Apr 2004 02:55:42 +0000 Subject: [PATCH] updated git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1515 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/via/vt8235/Config.lb | 2 +- src/southbridge/via/vt8235/chip.h | 10 ++--- src/southbridge/via/vt8235/vt8235.c | 42 +++++++++---------- .../via/vt8235/vt8235_early_serial.c | 26 ++++++------ .../via/vt8235/vt8235_early_smbus.c | 2 +- 5 files changed, 41 insertions(+), 41 deletions(-) diff --git a/src/southbridge/via/vt8235/Config.lb b/src/southbridge/via/vt8235/Config.lb index b0b2ef5abf..89c12b7518 100644 --- a/src/southbridge/via/vt8235/Config.lb +++ b/src/southbridge/via/vt8235/Config.lb @@ -1,2 +1,2 @@ config chip.h -object vt8231.o +object vt8235.o diff --git a/src/southbridge/via/vt8235/chip.h b/src/southbridge/via/vt8235/chip.h index fe3d332675..897ba13bf6 100644 --- a/src/southbridge/via/vt8235/chip.h +++ b/src/southbridge/via/vt8235/chip.h @@ -1,9 +1,9 @@ -#ifndef _SOUTHBRIDGE_VIA_VT8231 -#define _SOUTHBRIDGE_VIA_VT8231 +#ifndef _SOUTHBRIDGE_VIA_VT8235 +#define _SOUTHBRIDGE_VIA_VT8235 -extern struct chip_control southbridge_via_vt8231_control; +extern struct chip_control southbridge_via_vt8235_control; -struct southbridge_via_vt8231_config { +struct southbridge_via_vt8235_config { /* PCI function enables */ /* i.e. so that pci scan bus will find them. */ /* I am putting in IDE as an example but obviously this needs @@ -18,4 +18,4 @@ struct southbridge_via_vt8231_config { int enable_nvram; }; -#endif /* _SOUTHBRIDGE_VIA_VT8231 */ +#endif /* _SOUTHBRIDGE_VIA_VT8235 */ diff --git a/src/southbridge/via/vt8235/vt8235.c b/src/southbridge/via/vt8235/vt8235.c index 89445d6a2a..8d5292fad2 100644 --- a/src/southbridge/via/vt8235/vt8235.c +++ b/src/southbridge/via/vt8235/vt8235.c @@ -6,22 +6,22 @@ #include #include #include -#include "vt8231.h" +#include "vt8235.h" #include "chip.h" void pc_keyboard_init(void); void hard_reset(void) { - printk_err("NO HARD RESET ON VT8231! FIX ME!\n"); + printk_err("NO HARD RESET ON VT8235! FIX ME!\n"); } static void usb_on(int enable) { unsigned char regval; - /* Base 8231 controller */ - device_t dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0); + /* Base 8235 controller */ + device_t dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, 0); /* USB controller 1 */ device_t dev2 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, 0); /* USB controller 2 */ @@ -72,8 +72,8 @@ static void keyboard_on(void) { unsigned char regval; - /* Base 8231 controller */ - device_t dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0); + /* Base 8235 controller */ + device_t dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, 0); /* kevinh/Ispiri - update entire function to use new pci_write_config8 */ @@ -89,7 +89,7 @@ static void keyboard_on(void) static void nvram_on(void) { /* - * the VIA 8231 South has a very different nvram setup than the + * the VIA 8235 South has a very different nvram setup than the * piix4e ... * turn on ProMedia nvram. * TO DO: use the PciWriteByte function here. @@ -138,7 +138,7 @@ static void ethernet_fixup() * (e.g. device_t). This needs to get fixed. We need low-level pci scans * in the C code. */ -static void vt8231_pci_enable(struct southbridge_via_vt8231_config *conf) +static void vt8235_pci_enable(struct southbridge_via_vt8235_config *conf) { /* unsigned long busdevfn = 0x8000; @@ -166,7 +166,7 @@ static void pci_routing_fixup(void) { device_t dev; - dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0); + dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, 0); printk_info("%s: dev is %p\n", __FUNCTION__, dev); if (dev) { /* initialize PCI interupts - these assignments depend @@ -201,7 +201,7 @@ void dump_south(void) { device_t dev0; - dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0); + dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, 0); int i,j; for(i = 0; i < 256; i += 16) { @@ -213,7 +213,7 @@ dump_south(void) } } -static void vt8231_init(struct southbridge_via_vt8231_config *conf) +static void vt8235_init(struct southbridge_via_vt8235_config *conf) { unsigned char enables; device_t dev0; @@ -223,13 +223,13 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf) // to do: use the pcibios_find function here, instead of // hard coding the devfn. // done - kevinh/Ispiri - printk_debug("vt8231 init\n"); - /* Base 8231 controller */ - dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0); + printk_debug("vt8235 init\n"); + /* Base 8235 controller */ + dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, 0); /* IDE controller */ dev1 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, 0); /* Power management controller */ - devpwr = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231_4, 0); + devpwr = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235_4, 0); // enable the internal I/O decode enables = pci_read_config8(dev0, 0x6C); @@ -427,16 +427,16 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf) static void southbridge_init(struct chip *chip, enum chip_pass pass) { - struct southbridge_via_vt8231_config *conf = - (struct southbridge_via_vt8231_config *)chip->chip_info; + struct southbridge_via_vt8235_config *conf = + (struct southbridge_via_vt8235_config *)chip->chip_info; switch (pass) { case CONF_PASS_PRE_PCI: - vt8231_pci_enable(conf); + vt8235_pci_enable(conf); break; case CONF_PASS_POST_PCI: - vt8231_init(conf); + vt8235_init(conf); pci_routing_fixup(); break; @@ -457,8 +457,8 @@ static void enumerate(struct chip *chip) chip->dev->ops = &default_pci_ops_bus; } -struct chip_control southbridge_via_vt8231_control = { +struct chip_control southbridge_via_vt8235_control = { .enumerate = enumerate, .enable = southbridge_init, - .name = "VIA vt8231" + .name = "VIA vt8235" }; diff --git a/src/southbridge/via/vt8235/vt8235_early_serial.c b/src/southbridge/via/vt8235/vt8235_early_serial.c index 1bfffed7f5..4e59bbf3ec 100644 --- a/src/southbridge/via/vt8235/vt8235_early_serial.c +++ b/src/southbridge/via/vt8235/vt8235_early_serial.c @@ -8,18 +8,18 @@ #define SIO_BASE 0x3f0 #define SIO_DATA SIO_BASE+1 -static void vt8231_writesuper(uint8_t reg, uint8_t val) +static void vt8235_writesuper(uint8_t reg, uint8_t val) { outb(reg, SIO_BASE); outb(val, SIO_DATA); } -static void vt8231_writesiobyte(uint16_t reg, uint8_t val) +static void vt8235_writesiobyte(uint16_t reg, uint8_t val) { outb(val, reg); } -static void vt8231_writesioword(uint16_t reg, uint16_t val) +static void vt8235_writesioword(uint16_t reg, uint16_t val) { outw(val, reg); } @@ -29,13 +29,13 @@ static void vt8231_writesioword(uint16_t reg, uint16_t val) mainboard */ -static void enable_vt8231_serial(void) +static void enable_vt8235_serial(void) { unsigned long x; uint8_t c; device_t dev; outb(6, 0x80); - dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0); + dev = pci_locate_device(PCI_ID(0x1106,0x8235), 0); if (dev == PCI_DEV_INVALID) { outb(7, 0x80); @@ -51,25 +51,25 @@ static void enable_vt8231_serial(void) outb(2, 0x80); // now go ahead and set up com1. // set address - vt8231_writesuper(0xf4, 0xfe); + vt8235_writesuper(0xf4, 0xfe); // enable serial out - vt8231_writesuper(0xf2, 7); + vt8235_writesuper(0xf2, 7); // That's it for the sio stuff. // movl $SUPERIOCONFIG, %eax // movb $9, %dl // PCI_WRITE_CONFIG_BYTE // set up reg to set baud rate. - vt8231_writesiobyte(0x3fb, 0x80); + vt8235_writesiobyte(0x3fb, 0x80); // Set 115 kb - vt8231_writesioword(0x3f8, 1); + vt8235_writesioword(0x3f8, 1); // Set 9.6 kb // WRITESIOWORD(0x3f8, 12) // now set no parity, one stop, 8 bits - vt8231_writesiobyte(0x3fb, 3); + vt8235_writesiobyte(0x3fb, 3); // now turn on RTS, DRT - vt8231_writesiobyte(0x3fc, 3); + vt8235_writesiobyte(0x3fc, 3); // Enable interrupts - vt8231_writesiobyte(0x3f9, 0xf); + vt8235_writesiobyte(0x3f9, 0xf); // should be done. Dump a char for fun. - vt8231_writesiobyte(0x3f8, 48); + vt8235_writesiobyte(0x3f8, 48); } diff --git a/src/southbridge/via/vt8235/vt8235_early_smbus.c b/src/southbridge/via/vt8235/vt8235_early_smbus.c index 1888176144..9d03dacd44 100644 --- a/src/southbridge/via/vt8235/vt8235_early_smbus.c +++ b/src/southbridge/via/vt8235/vt8235_early_smbus.c @@ -43,7 +43,7 @@ static void enable_smbus(void) /* make it work for I/O ... */ - dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0); + dev = pci_locate_device(PCI_ID(0x1106,0x8235), 0); c = pci_read_config8(dev, 4); c |= 1; pci_write_config8(dev, 4, c);