Slippy/Falco: Fill in right values for PHSYNC and PVSYNC in transcoder flags

Depending upon the values decoded from edid, the function decides the appropriate bits to
be set in flags parameter (Important for fastboot to work correctly in kernel)

Change-Id: I3b0f914dc2b0fd887eb6a1f706f87b87c86ff856
Reviewed-on: https://gerrit.chromium.org/gerrit/64265
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/4423
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

src/drivers/intel/gma/i915.h

@@ -228,7 +228,9 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp,
 				    enum pipe pipe,
 				    int type,
 				    int lane_count,
-				    int pf_sz);
+				    int pf_sz,
+				    u8 phsync,
+				    u8 pvsync);
 
 enum transcoder intel_ddi_get_transcoder(enum port port,
 					 enum pipe pipe);

src/drivers/intel/gma/intel_ddi.c

@@ -163,7 +163,9 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp,
 				    enum pipe pipe,
 				    int type,
 				    int lane_count,
-				    int pf_sz)
+				    int pf_sz,
+				    u8 phsync,
+				    u8 pvsync)
 {
 	u32 temp;
 
@@ -206,7 +208,11 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp,
 		}
 	}
 
-	/* We need to check for TRANS_DDI_PVSYNC and TRANS_DDI_PHSYNC -- How? */
+	if (phsync)
+		temp |= TRANS_DDI_PHSYNC;
+
+	if (pvsync)
+		temp |= TRANS_DDI_PVSYNC;
 
 	if (type == INTEL_OUTPUT_HDMI) {
 		/* Need to understand when to set TRANS_DDI_MODE_SELECT_HDMI / TRANS_DDI_MODE_SELECT_DVI */

src/mainboard/google/slippy/gma.c

@@ -293,7 +293,9 @@ void dp_init_dim_regs(struct intel_dp *dp)
 						    dp->pipe,
 						    dp->type,
 						    dp->lane_count,
-						    dp->pfa_sz);
+						    dp->pfa_sz,
+						    dp->edid.phsync == '+'?1:0,
+						    dp->edid.pvsync == '+'?1:0);
 
 	dp->transcoder = intel_ddi_get_transcoder(dp->port,
 						  dp->pipe);