More Hudson 64bit fixes
Change-Id: I2a6cd7ad27cb6d16dfe3267ea6fb844a5e2e20c6 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/11083 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -40,22 +40,22 @@
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void pm_write8(u8 reg, u8 value)
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{
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write8((void *)(PM_MMIO_BASE + reg), value);
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write8((void *)((uintptr_t)PM_MMIO_BASE + reg), value);
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}
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u8 pm_read8(u8 reg)
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{
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return read8((void *)(PM_MMIO_BASE + reg));
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return read8((void *)((uintptr_t)PM_MMIO_BASE + reg));
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}
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void pm_write16(u8 reg, u16 value)
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{
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write16((void *)(PM_MMIO_BASE + reg), value);
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write16((void *)((uintptr_t)PM_MMIO_BASE + reg), value);
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}
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u16 pm_read16(u16 reg)
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{
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return read16((void *)(PM_MMIO_BASE + reg));
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return read16((void *)((uintptr_t)PM_MMIO_BASE + reg));
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}
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#define PM_REG_USB_ENABLE 0xef
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@ -41,7 +41,7 @@ static void sata_init(struct device *dev)
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#define CFG_CAP_SPM (1<<12)
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volatile u32 *ahci_ptr =
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(u32*)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00);
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(u32*)(uintptr_t)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00);
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u32 temp;
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/* unlock the write-protect */
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@ -36,22 +36,22 @@ enum smi_lvl {
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static inline uint32_t smi_read32(uint8_t offset)
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{
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return read32((void *)(SMI_BASE + offset));
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return read32((void *)((uintptr_t)SMI_BASE + offset));
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}
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static inline void smi_write32(uint8_t offset, uint32_t value)
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{
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write32((void *)(SMI_BASE + offset), value);
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write32((void *)((uintptr_t)SMI_BASE + offset), value);
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}
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static inline uint16_t smi_read16(uint8_t offset)
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{
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return read16((void *)(SMI_BASE + offset));
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return read16((void *)((uintptr_t)SMI_BASE + offset));
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}
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static inline void smi_write16(uint8_t offset, uint16_t value)
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{
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write16((void *)(SMI_BASE + offset), value);
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write16((void *)((uintptr_t)SMI_BASE + offset), value);
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}
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void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
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