cpu/intel/model_206ax/acpi.c: Do not report P_BLK
IO MWAIT redirection is disabled, which means reads to the P_LVL2 and P_LVL3 "registers" will never produce any C-state transition requests. Change-Id: Ibbf7b915a9909d6bc8e784a439df751e11ec5bee Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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@ -205,7 +205,7 @@ static void generate_P_state_entries(int core, int cores_per_package)
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void generate_cpu_entries(const struct device *device)
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void generate_cpu_entries(const struct device *device)
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{
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{
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int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
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int coreID, cpuID;
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int totalcores = dev_count_cpu();
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int totalcores = dev_count_cpu();
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int cores_per_package = get_cores_per_package();
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int cores_per_package = get_cores_per_package();
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int numcpus = totalcores/cores_per_package;
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int numcpus = totalcores/cores_per_package;
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@ -215,15 +215,9 @@ void generate_cpu_entries(const struct device *device)
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for (cpuID = 1; cpuID <= numcpus; cpuID++) {
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for (cpuID = 1; cpuID <= numcpus; cpuID++) {
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for (coreID = 1; coreID <= cores_per_package; coreID++) {
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for (coreID = 1; coreID <= cores_per_package; coreID++) {
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if (coreID > 1) {
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pcontrol_blk = 0;
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plen = 0;
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}
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/* Generate processor \_SB.CPUx */
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/* Generate processor \_SB.CPUx */
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acpigen_write_processor(
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acpigen_write_processor(
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(cpuID-1)*cores_per_package+coreID-1,
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(cpuID-1)*cores_per_package+coreID-1, 0, 0);
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pcontrol_blk, plen);
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/* Generate P-state tables */
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/* Generate P-state tables */
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generate_P_state_entries(
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generate_P_state_entries(
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