src/drivers: Capitalize CPU, RAM and ACPI
Change-Id: I720469ea1df75544f5b1e0cab718502d8a9cf197 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15983 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Martin Roth <martinroth@google.com>
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@ -361,7 +361,7 @@ static void w83795_hwm_init(struct device *dev)
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info = cpu_info();
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cpu = info->cpu;
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if (!cpu)
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die("CPU: missing cpu device structure");
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die("CPU: missing CPU device structure");
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if (cpu->vendor == X86_VENDOR_AMD)
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w83795_init(dev, THERMAL_CRUISE_MODE, DTS_SRC_AMD_SBTSI);
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@ -154,7 +154,7 @@ before_romstage:
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call cache_as_ram_main
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/* One will never return from cache_as_ram_main() in verstage so there's
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* no such thing as after ram init. */
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* no such thing as after RAM init. */
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#if !ENV_VERSTAGE
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#include "after_raminit.S"
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#endif
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@ -69,7 +69,7 @@ asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params)
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set_fih_car(car_params->fih);
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/* Return new stack value in ram back to assembly stub. */
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/* Return new stack value in RAM back to assembly stub. */
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return cache_as_ram_stage_main(car_params->fih);
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}
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@ -93,7 +93,7 @@ asmlinkage void *romstage_after_verstage(void)
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set_fih_car(fih);
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/* Return new stack value in ram back to assembly stub. */
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/* Return new stack value in RAM back to assembly stub. */
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return cache_as_ram_stage_main(fih);
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}
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@ -34,7 +34,7 @@ asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params);
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asmlinkage void after_cache_as_ram(void *chipset_context);
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asmlinkage void *romstage_after_verstage(void);
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/* Per stage calls from the above two functions. The void * return from
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* cache_as_ram_stage_main() is the stack pointer to use in ram after
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* cache_as_ram_stage_main() is the stack pointer to use in RAM after
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* exiting cache-as-ram mode. */
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void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih);
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void after_cache_as_ram_stage(void);
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@ -52,7 +52,7 @@ typedef struct {
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#define SBIOS_VERSION_SIZE 32
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/* mailbox 1: public acpi methods */
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/* mailbox 1: public ACPI methods */
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typedef struct {
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u32 drdy;
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u32 csts;
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@ -51,7 +51,7 @@ asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)
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timestamp_add_now(TS_START_ROMSTAGE);
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/* Load microcode before ram init */
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/* Load microcode before RAM init */
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if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS))
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intel_update_microcode_from_cbfs();
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@ -53,7 +53,7 @@ vga_fb_init(void)
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vga_gr_write(0x07, 0x00);
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vga_gr_write(0x08, 0xFF);
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/* o/e enable: ram enable */
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/* o/e enable: RAM enable */
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vga_misc_mask(0x22, 0x22);
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}
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