drivers/tpm: Move tis_plat_irq_status to cr50 driver

tis_plat_irq_status() function is used only by Google TPM. It should
be moved to drivers/tpm/cr50.c. The name of the function was changed
to cr50_plat_irq_status().

BUG=b:277787305
TEST=Build all affected platforms

Change-Id: I78dc39f2c7b44232b06947d3dfe6afa52807ced8
Signed-off-by: Grzegorz Bernacki <bernacki@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75917
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

src/drivers/i2c/tpm/cr50.c

@@ -33,7 +33,6 @@
 #define CR50_TIMEOUT_INIT_MS	30000	/* Very long timeout for TPM init */
 #define CR50_TIMEOUT_LONG_MS	2000	/* Long timeout while waiting for TPM */
 #define CR50_TIMEOUT_SHORT_MS	2	/* Short timeout during transactions */
-#define CR50_TIMEOUT_NOIRQ_MS	20	/* Timeout for TPM ready without IRQ */
 #define CR50_DID_VID		0x00281ae0L
 #define TI50_DID_VID		0x504a6666L
 
@@ -46,20 +45,6 @@ struct tpm_inf_dev {
 
 static struct tpm_inf_dev tpm_dev;
 
-__weak int tis_plat_irq_status(void)
-{
-	static int warning_displayed;
-
-	if (!warning_displayed) {
-		printk(BIOS_WARNING, "%s() not implemented, wasting 20ms to wait on"
-		       " Cr50!\n", __func__);
-		warning_displayed = 1;
-	}
-	mdelay(CR50_TIMEOUT_NOIRQ_MS);
-
-	return 1;
-}
-
 /*
  * cr50_i2c_read() - read from TPM register
  *
@@ -79,7 +64,7 @@ static int cr50_i2c_read(uint8_t addr, uint8_t *buffer, size_t len)
 		return -1;
 
 	/* Clear interrupt before starting transaction */
-	tis_plat_irq_status();
+	cr50_plat_irq_status();
 
 	/* Send the register address byte to the TPM */
 	if (i2c_write_raw(tpm_dev.bus, tpm_dev.addr, &addr, 1)) {
@@ -125,7 +110,7 @@ static int cr50_i2c_write(uint8_t addr, const uint8_t *buffer, size_t len)
 	memcpy(tpm_dev.buf + 1, buffer, len);
 
 	/* Clear interrupt before starting transaction */
-	tis_plat_irq_status();
+	cr50_plat_irq_status();
 
 	/* Send write request buffer with address */
 	if (i2c_write_raw(tpm_dev.bus, tpm_dev.addr, tpm_dev.buf, len + 1)) {

src/drivers/spi/tpm/tpm.c

@@ -61,23 +61,6 @@ void tpm2_get_info(struct tpm2_info *info)
 	*info = tpm_info;
 }
 
-__weak int tis_plat_irq_status(void)
-{
-	static int warning_displayed;
-
-	if (!CONFIG(TPM_GOOGLE))
-		dead_code();
-
-	if (!warning_displayed) {
-		printk(BIOS_WARNING, "%s() not implemented, wasting 10ms to wait on"
-		       " Cr50!\n", __func__);
-		warning_displayed = 1;
-	}
-	mdelay(10);
-
-	return 1;
-}
-
 /*
  * Each TPM2 SPI transaction starts the same: CS is asserted, the 4 byte
  * header is sent to the TPM, the master waits til TPM is ready to continue.
@@ -421,7 +404,7 @@ int tpm2_init(struct spi_slave *spi_if)
 
 	/* Clear any pending IRQs. */
 	if (CONFIG(TPM_GOOGLE))
-		tis_plat_irq_status();
+		cr50_plat_irq_status();
 
 	/*
 	 * 150 ms should be enough to synchronize with the TPM even under the

src/drivers/tpm/cr50.c

@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause */
 
+#include <delay.h>
 #include <drivers/spi/tpm/tpm.h>
 #include <security/tpm/tis.h>
 #include <string.h>
@@ -17,6 +18,8 @@
 		(CONFIG(CR50_USE_LONG_INTERRUPT_PULSES) \
 		 ? CR50_BOARD_CFG_100US_READY_PULSE : 0)
 
+#define CR50_TIMEOUT_NOIRQ_MS	20	/* Timeout for TPM ready without IRQ */
+
 enum cr50_register {
 	CR50_FW_VER_REG,
 	CR50_BOARD_CFG_REG,
@@ -95,6 +98,20 @@ static uint32_t cr50_get_board_cfg(void)
 	return value & CR50_BOARD_CFG_FEATUREBITS_MASK;
 }
 
+__weak int cr50_plat_irq_status(void)
+{
+	static int warning_displayed;
+
+	if (!warning_displayed) {
+		printk(BIOS_WARNING, "%s() not implemented, wasting 20ms to wait on Cr50!\n",
+		       __func__);
+		warning_displayed = 1;
+	}
+	mdelay(CR50_TIMEOUT_NOIRQ_MS);
+
+	return 1;
+}
+
 /**
  * Set the BOARD_CFG register on the TPM chip to a particular compile-time constant value.
  */
@@ -235,7 +252,7 @@ enum cb_err cr50_wait_tpm_ready(void)
 
 	stopwatch_init_msecs_expire(&sw, CONFIG_GOOGLE_TPM_IRQ_TIMEOUT_MS);
 
-	while (!tis_plat_irq_status())
+	while (!cr50_plat_irq_status())
 		if (stopwatch_expired(&sw)) {
 			printk(BIOS_ERR, "Cr50 TPM IRQ timeout!\n");
 			return CB_ERR;

src/drivers/tpm/cr50.h

@@ -24,4 +24,7 @@ enum cb_err cr50_set_board_cfg(void);
 /* Wait for IRQ to indicate the TPM is ready */
 enum cb_err cr50_wait_tpm_ready(void);
 
+/* Check TPM IRQ and clear it, returns 1 when IRQ pending or 0 when not */
+int cr50_plat_irq_status(void);
+
 #endif /* __DRIVERS_TPM_CR50_H__ */

src/mainboard/google/asurada/chromeos.c

@@ -2,8 +2,8 @@
 
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 
 #include "gpio.h"
 
@@ -36,7 +36,7 @@ int get_write_protect_state(void)
 	return !gpio_get(GPIO_WP);
 }
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_eint_poll(GPIO_H1_AP_INT);
 }

src/mainboard/google/cherry/chromeos.c

@@ -2,8 +2,8 @@
 
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 
 #include "gpio.h"
 
@@ -61,7 +61,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 		lb_add_gpios(gpios, spk_gpios, ARRAY_SIZE(spk_gpios));
 }
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_eint_poll(GPIO_GSC_AP_INT);
 }

src/mainboard/google/corsola/chromeos.c

@@ -2,9 +2,9 @@
 
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
+#include <drivers/tpm/cr50.h>
 #include <ec/google/chromeec/ec.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 #include <stdbool.h>
 
 #include "gpio.h"
@@ -68,7 +68,7 @@ int get_ec_is_trusted(void)
 	return !!gpio_get(GPIO_EC_IN_RW_ODL);
 }
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_eint_poll(GPIO_GSC_AP_INT_ODL);
 }

src/mainboard/google/geralt/chromeos.c

@@ -2,8 +2,8 @@
 
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 
 #include "gpio.h"
 #include "panel.h"
@@ -67,7 +67,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	}
 }
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_eint_poll(GPIO_GSC_AP_INT_ODL);
 }

src/mainboard/google/gru/chromeos.c

@@ -2,8 +2,8 @@
 
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 
 #include "board.h"
 
@@ -44,7 +44,7 @@ void setup_chromeos_gpios(void)
 }
 
 #if CONFIG(GRU_HAS_TPM2)
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_irq_status(GPIO_TPM_IRQ);
 }

src/mainboard/google/guybrush/variants/baseboard/tpm_tis.c

@@ -1,10 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <boardid.h>
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	gpio_t irq_gpio = GPIO_85;
 	uint32_t board_ver = board_id();

src/mainboard/google/herobrine/chromeos.c

@@ -3,7 +3,7 @@
 #include <boot/coreboot_tables.h>
 #include <bootmode.h>
 #include "board.h"
-#include <security/tpm/tis.h>
+#include <drivers/tpm/cr50.h>
 
 void setup_chromeos_gpios(void)
 {
@@ -55,7 +55,7 @@ int get_ec_is_trusted(void)
 		return 1;
 }
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_irq_status(GPIO_H1_AP_INT);
 }

src/mainboard/google/kahlee/variants/baseboard/tpm_tis.c

@@ -1,10 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 #include <variant/gpio.h>
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_interrupt_status(GPIO_9);
 }

src/mainboard/google/kukui/chromeos.c

@@ -2,8 +2,8 @@
 
 #include <bootmode.h>
 #include <boot/coreboot_tables.h>
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 
 #include "gpio.h"
 
@@ -33,7 +33,7 @@ int get_write_protect_state(void)
 	return !gpio_get(GPIO_WP);
 }
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_eint_poll(CR50_IRQ);
 }

src/mainboard/google/myst/variants/baseboard/tpm_tis.c

@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
-#include <security/tpm/tis.h>
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_interrupt_status(GPIO_84);
 }

src/mainboard/google/oak/tpm_tis.c

@@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 
 #include "gpio.h"
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_eint_poll(CR50_IRQ);
 }

src/mainboard/google/skyrim/variants/baseboard/tpm_tis.c

@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
-#include <security/tpm/tis.h>
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_interrupt_status(GPIO_18);
 }

src/mainboard/google/trogdor/chromeos.c

@@ -3,7 +3,7 @@
 #include <boot/coreboot_tables.h>
 #include <bootmode.h>
 #include "board.h"
-#include <security/tpm/tis.h>
+#include <drivers/tpm/cr50.h>
 
 void setup_chromeos_gpios(void)
 {
@@ -53,7 +53,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_irq_status(GPIO_H1_AP_INT);
 }

src/mainboard/google/zork/variants/baseboard/tpm_tis.c

@@ -1,10 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
+#include <drivers/tpm/cr50.h>
 #include <gpio.h>
-#include <security/tpm/tis.h>
 #include <variant/gpio.h>
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return gpio_interrupt_status(GPIO_3);
 }

src/security/tpm/tis.h

@@ -64,17 +64,6 @@ int tis_open(void);
 int tis_sendrecv(const u8 *sendbuf, size_t send_size, u8 *recvbuf,
 			size_t *recv_len);
 
-/* TODO: This is supposed to be used only for Google TPM.
-   Consider moving this to drivers/tpm/cr50.h. */
-/*
- * tis_plat_irq_status()
- *
- * Check tpm irq and clear it.
- *
- * Returns 1 when irq pending or 0 when not.
- */
-int tis_plat_irq_status(void);
-
 /*
  * tis_vendor_write()
  *

src/soc/intel/common/tpm_tis.c

@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
-#include <security/tpm/tis.h>
+#include <drivers/tpm/cr50.h>
 
-int tis_plat_irq_status(void)
+int cr50_plat_irq_status(void)
 {
 	return acpi_get_gpe(CONFIG_TPM_TIS_ACPI_INTERRUPT);
 }