arch/x86/*.S: use defines instead of hardcoded values
As preparation for x86_64 clean the assembly code and introduce arch/ram_segs.h similar to existing arch/rom_segs.h. Replace open coded segment values with the defines from the new header. Change-Id: Ib006cd4df59951335506b8153e9347450ec3403e Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36321 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph
Aaron Durbin
parent
5f2576089f
commit
776da0872e
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@ -12,6 +12,7 @@
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*/
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#include <cpu/x86/post_code.h>
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#include <arch/ram_segs.h>
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/* Place the stack in the bss section. It's not necessary to define it in the
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* the linker script. */
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@ -42,16 +43,16 @@ _start:
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cli
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lgdt %cs:gdtaddr
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#ifndef __x86_64__
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ljmp $0x10, $1f
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ljmp $RAM_CODE_SEG, $1f
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#endif
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1: movl $0x18, %eax
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1: movl $RAM_DATA_SEG, %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %ss
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movl %eax, %fs
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movl %eax, %gs
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#ifdef __x86_64__
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mov $0x48, %ecx
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mov $RAM_CODE_SEG64, %ecx
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call SetCodeSelector
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#endif
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@ -0,0 +1,25 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef RAM_SEGS_H
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#define RAM_SEGS_H
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#define RAM_CODE_SEG 0x10
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#define RAM_DATA_SEG 0x18
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#define RAM_CODE16_SEG 0x28
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#define RAM_DATA16_SEG 0x30
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#define RAM_CODE_ACPI_SEG 0x38
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#define RAM_DATA_ACPI_SEG 0x40
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#define RAM_CODE_SEG64 0x48
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#endif /* RAM_SEGS_H */
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@ -13,6 +13,7 @@
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/lapic_def.h>
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#include <arch/ram_segs.h>
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.text
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.globl _secondary_start, _secondary_start_end, _secondary_gdt_addr
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@ -38,7 +39,7 @@ _secondary_start:
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orl $0x60000001, %eax /* CD, NW, PE = 1 */
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movl %eax, %cr0
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ljmpl $0x10, $__ap_protected_start
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ljmpl $RAM_CODE_SEG, $__ap_protected_start
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/* This will get filled in by C code. */
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_secondary_gdt_addr:
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@ -51,11 +52,11 @@ _secondary_start_end:
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ap_protected_start:
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.code32
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lgdt gdtaddr
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ljmpl $0x10, $__ap_protected_start
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ljmpl $RAM_CODE_SEG, $__ap_protected_start
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__ap_protected_start:
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movw $0x18, %ax
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movw $RAM_DATA_SEG, %ax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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@ -15,15 +15,12 @@
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#include <cpu/x86/cr.h>
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#include <cpu/amd/mtrr.h>
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#include <cpu/x86/msr.h>
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#include <arch/ram_segs.h>
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/* The SIPI vector is responsible for initializing the APs in the system. It
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* loads microcode, sets up MSRs, and enables caching before calling into
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* C code. */
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/* These segment selectors need to match the gdt entries in c_start.S. */
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#define CODE_SEG 0x10
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#define DATA_SEG 0x18
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.section ".module_parameters", "aw", @progbits
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ap_start_params:
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gdtaddr:
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@ -83,10 +80,10 @@ _start:
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orl $CR0_SET_FLAGS, %eax
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movl %eax, %cr0
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ljmpl $CODE_SEG, $1f
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ljmpl $RAM_CODE_SEG, $1f
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1:
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.code32
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movw $DATA_SEG, %ax
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movw $RAM_DATA_SEG, %ax
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %ss
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@ -14,6 +14,8 @@
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#define REALMODE_BASE 0x600
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#define RELOCATED(x) (x - __realmode_code + REALMODE_BASE)
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#include <arch/ram_segs.h>
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/* CR0 bits */
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#define PE (1 << 0)
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@ -106,7 +108,7 @@ __realmode_call:
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movl %eax, __registers + 20 /* edi */
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/* Activate the right segment descriptor real mode. */
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ljmp $0x28, $RELOCATED(1f)
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ljmp $RAM_CODE16_SEG, $RELOCATED(1f)
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1:
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.code16
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/* 16 bit code from here on... */
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@ -116,7 +118,7 @@ __realmode_call:
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* configurations (limits, writability, etc.) once
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* protected mode is turned off.
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*/
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mov $0x30, %ax
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mov $RAM_DATA16_SEG, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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@ -186,10 +188,10 @@ __lcall_instr = RELOCATED(.)
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/* Now that we are in protected mode
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* jump to a 32 bit code segment.
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*/
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ljmpl $0x10, $RELOCATED(1f)
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ljmpl $RAM_CODE_SEG, $RELOCATED(1f)
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1:
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.code32
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mov $0x18, %ax
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mov $RAM_DATA_SEG, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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@ -242,7 +244,7 @@ __realmode_interrupt:
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movl %eax, __registers + 20 /* edi */
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/* This configures CS properly for real mode. */
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ljmp $0x28, $RELOCATED(1f)
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ljmp $RAM_CODE16_SEG, $RELOCATED(1f)
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1:
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.code16 /* 16 bit code from here on... */
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@ -250,7 +252,7 @@ __realmode_interrupt:
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* descriptors. They will retain these configurations (limits,
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* writability, etc.) once protected mode is turned off.
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*/
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mov $0x30, %ax
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mov $RAM_DATA16_SEG, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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@ -314,10 +316,10 @@ __intXX_instr = RELOCATED(.)
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movl %eax, %cr0
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/* Now that we are in protected mode jump to a 32-bit code segment. */
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ljmpl $0x10, $RELOCATED(1f)
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ljmpl $RAM_CODE_SEG, $RELOCATED(1f)
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1:
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.code32
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mov $0x18, %ax
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mov $RAM_DATA_SEG, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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@ -363,10 +365,10 @@ __interrupt_handler_16bit = RELOCATED(.)
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movl %eax, %cr0
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/* ... and jump to a 32 bit code segment. */
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ljmpl $0x10, $RELOCATED(1f)
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ljmpl $RAM_CODE_SEG, $RELOCATED(1f)
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1:
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.code32
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mov $0x18, %ax
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mov $RAM_DATA_SEG, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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@ -380,14 +382,14 @@ __interrupt_handler_16bit = RELOCATED(.)
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call *%eax
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/* Now return to real mode ... */
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ljmp $0x28, $RELOCATED(1f)
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ljmp $RAM_CODE16_SEG, $RELOCATED(1f)
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1:
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.code16
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/* Load the segment registers with properly configured segment
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* descriptors. They will retain these configurations (limits,
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* writability, etc.) once protected mode is turned off.
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*/
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mov $0x30, %ax
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mov $RAM_DATA16_SEG, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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