now builds with *0* tweaks.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -48,6 +48,12 @@ end
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#
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#### Should this be in the northbridge code?
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mainboardinit arch/i386/lib/cpu_reset.inc
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###
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### Setup the serial port
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###
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#mainboardinit superiowinbond/w83627hf/setup_serial.inc
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mainboardinit pc80/serial.inc
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mainboardinit arch/i386/lib/console.inc
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#
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###
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### Include an id string (For safe flashing)
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@ -94,12 +100,6 @@ end
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# mainboardinit southbridgeamd/amd8111/disable_watchdog.inc
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#end
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#
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###
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### Setup the serial port
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###
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#mainboardinit superiowinbond/w83627hf/setup_serial.inc
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mainboardinit pc80/serial.inc
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mainboardinit arch/i386/lib/console.inc
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if USE_FALLBACK_IMAGE mainboardinit arch/i386/lib/noop_failover.inc end
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#
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###
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@ -827,9 +827,6 @@ CPUFLAGS := $(foreach _var_,$(VARIABLES),$(call D_item,$(_var_)))
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else:
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file.write("CRT0_INCLUDES += $(TOP)/src/%s\n" % i)
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#for source in sources:
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#file.write("SOURCES += %s\n" % source)
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# Print out the user defines.
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file.write("\n# userdefines:\n")
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#for udef in userdefines:
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