now builds with *0* tweaks.

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich 2003-06-30 17:07:13 +00:00
parent b5391cc4b9
commit 776fce9449
2 changed files with 6 additions and 9 deletions

View File

@ -48,6 +48,12 @@ end
#
#### Should this be in the northbridge code?
mainboardinit arch/i386/lib/cpu_reset.inc
###
### Setup the serial port
###
#mainboardinit superiowinbond/w83627hf/setup_serial.inc
mainboardinit pc80/serial.inc
mainboardinit arch/i386/lib/console.inc
#
###
### Include an id string (For safe flashing)
@ -94,12 +100,6 @@ end
# mainboardinit southbridgeamd/amd8111/disable_watchdog.inc
#end
#
###
### Setup the serial port
###
#mainboardinit superiowinbond/w83627hf/setup_serial.inc
mainboardinit pc80/serial.inc
mainboardinit arch/i386/lib/console.inc
if USE_FALLBACK_IMAGE mainboardinit arch/i386/lib/noop_failover.inc end
#
###

View File

@ -827,9 +827,6 @@ CPUFLAGS := $(foreach _var_,$(VARIABLES),$(call D_item,$(_var_)))
else:
file.write("CRT0_INCLUDES += $(TOP)/src/%s\n" % i)
#for source in sources:
#file.write("SOURCES += %s\n" % source)
# Print out the user defines.
file.write("\n# userdefines:\n")
#for udef in userdefines: