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superio/nuvoton: Improve code formatting 

Change-Id: I8cdfa5c3e3508ea8ad969df6513401611a066fc5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39930
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2020-03-30 16:46:18 +02:00 committed by Felix Held
parent e8fcf1bf8d
commit 7774de53d4
3 changed files with 4 additions and 7 deletions
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2
src/superio/nuvoton/nct5104d/nct5104d.h
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@ -26,7 +26,7 @@
#define NCT5104D_FDC 0x00 /* FDC - not pinned out */
#define NCT5104D_SP1 0x02 /* UARTA */
#define NCT5104D_SP2 0x03 /* UARTB */
#define NCT5104D_GPIO_PP_OD 0x0F /* GPIO Push-Pull / Open drain select */
#define NCT5104D_GPIO_PP_OD 0x0F /* GPIO Push-Pull / Open drain select */
#define NCT5104D_SP3 0x10 /* UARTC */
#define NCT5104D_SP4 0x11 /* UARTD */
#define NCT5104D_PORT80 0x14 /* PORT 80 */

3
src/superio/nuvoton/npcd378/npcd378.h
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@ -31,8 +31,7 @@ uint8_t npcd378_hwm_read(const uint16_t iobase, const uint16_t reg);
* @param reg MSB is page, LSB sets the offset in selected page
* @param val The value to write to HWM register
*/
void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg,
const uint8_t val);
void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, const uint8_t val);
/*
* Notify SuperIO a host-to-device transfer is ongoing.

6
src/superio/nuvoton/npcd378/superio.c
View File

@ -26,8 +26,7 @@ uint8_t npcd378_hwm_read(const uint16_t iobase, const uint16_t reg)
return reg8;
}
void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg,
const uint8_t val)
void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, const uint8_t val)
{
outb((reg >> 8) & 0xf, iobase + 0xff);
outb(val, iobase + (reg & 0xff));
@ -65,8 +64,7 @@ static void npcd378_init(struct device *dev)
case NPCD378_HWM:
res = find_resource(dev, PNP_IDX_IO0);
if (!res || !res->base) {
printk(BIOS_ERR, "NPCD378: LDN%u IOBASE not set.\n",
NPCD378_HWM);
printk(BIOS_ERR, "NPCD378: LDN%u IOBASE not set.\n", NPCD378_HWM);
break;
}