soc/intel/common/gpio: Fix cosmetic issue with `gpio_lock_pads`
This patch replaces hardcoded `4` (next offset Tx state) with `sizeof(uint32_t)` for calculating 'Tx state offset'. Also, add checks to detect the specific GPIO lock action between `LOCK_CONFIG` or 'LOCK_TX'. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Iff712b16808e0bc99c575bb2426a4f84b89fdb73 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60994 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
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@ -520,13 +520,14 @@ int gpio_lock_pads(const struct gpio_lock_config *pad_list, const size_t count)
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__func__, pad);
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continue;
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}
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/* PADCFGLOCK and PADCFGLOCKTX registers for each community are contiguous */
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offset += gpio_group_index_scaled(comm, rel_pad, 2 * sizeof(uint32_t));
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data = gpio_bitmask_within_group(comm, rel_pad);
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msg.pid = comm->port;
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msg.offset = offset;
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if (action & GPIO_LOCK_CONFIG) {
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if ((action & GPIO_LOCK_CONFIG) == GPIO_LOCK_CONFIG) {
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if (CONFIG(DEBUG_GPIO))
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printk(BIOS_INFO, "%s: Locking pad %d configuration\n",
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__func__, pad);
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@ -537,11 +538,11 @@ int gpio_lock_pads(const struct gpio_lock_config *pad_list, const size_t count)
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}
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}
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if (action & GPIO_LOCK_TX) {
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if ((action & GPIO_LOCK_TX) == GPIO_LOCK_TX) {
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if (CONFIG(DEBUG_GPIO))
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printk(BIOS_INFO, "%s: Locking pad %d TX state\n",
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__func__, pad);
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msg.offset += 4;
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msg.offset += sizeof(uint32_t);
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status = pcr_execute_sideband_msg(&msg, &data, &response);
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if ((err = sideband_msg_err(status, response)) != 0) {
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err_response = err;
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