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mb/google/brya/var/marasov: Update SPD ID assignment 

Adjust SPD ID order

DRAM Part Name                 ID to assign
MT62F512M32D2DR-031 WT:B	0 (0000)
H9JCNNNBK3MLYR-N6E		1 (0001)
MT62F1G32D4DR-031 WT:B		2 (0010)
H9JCNNNCP3MLYR-N6E		3 (0011)

BUG=b:254365935
BRANCH=None
TEST=run part_id_gen to generate SPD id

Signed-off-by: Frank Chu <Frank_Chu@pegatron.corp-partner.google.com>
Change-Id: I3a62cf355508debce387c48d9d089e73763b2bf0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69784
Reviewed-by: Frank Chu <frank_chu@pegatron.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Frank Chu 2022-11-18 16:18:43 +08:00 committed by Eric Lai
parent 461f2a9ba0
commit 77c4d6165d
2 changed files with 4 additions and 4 deletions
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4
src/mainboard/google/brya/variants/marasov/memory/Makefile.inc
View File

@ -6,5 +6,5 @@
SPD_SOURCES =
SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT62F512M32D2DR-031 WT:B
SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = H9JCNNNBK3MLYR-N6E
SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 4(0b0100) Parts = MT62F1G32D4DR-031 WT:B
SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 5(0b0101) Parts = H9JCNNNCP3MLYR-N6E
SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 2(0b0010) Parts = MT62F1G32D4DR-031 WT:B
SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 3(0b0011) Parts = H9JCNNNCP3MLYR-N6E

4
src/mainboard/google/brya/variants/marasov/memory/dram_id.generated.txt
View File

@ -6,5 +6,5 @@
DRAM Part Name ID to assign
MT62F512M32D2DR-031 WT:B 0 (0000)
H9JCNNNBK3MLYR-N6E 1 (0001)
MT62F1G32D4DR-031 WT:B 4 (0100)
H9JCNNNCP3MLYR-N6E 5 (0101)
MT62F1G32D4DR-031 WT:B 2 (0010)
H9JCNNNCP3MLYR-N6E 3 (0011)