onboard pci_rom
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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6c615429d3
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@ -273,8 +273,10 @@ static void pci_read_bases(struct device *dev, unsigned int howmany, unsigned lo
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resource = pci_get_resource(dev, index);
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index += (resource->flags & IORESOURCE_PCI64)?8:4;
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}
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if (rom)
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if (rom) {
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if ((!dev->on_mainboard) || (dev->rom_address == 0))
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pci_get_rom_resource(dev, rom);
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}
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compact_resources(dev);
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}
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@ -4,16 +4,23 @@
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include "../drivers/pci/onboard/chip.h"
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struct rom_header * pci_rom_probe(struct device *dev)
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{
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unsigned long rom_address;
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struct rom_header *rom_header;
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struct pci_data *rom_data;
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if (dev->on_mainboard && (dev->rom_address != 0) ) {
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rom_address = dev->rom_address;
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}
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else {
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rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);
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}
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rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);
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if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
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/* FixME: search in the LinuxBIOS Image for integrated
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* devices? */
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return NULL;
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}
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@ -11,9 +11,16 @@
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#include <device/pci_ops.h>
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#include "chip.h"
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static void onboard_enable(device_t dev)
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{
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struct drivers_pci_onboard_config *conf;
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conf = dev->chip_info;
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dev->rom_address = conf->rom_address;
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}
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struct chip_operations drivers_pci_onboard_ops = {
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#if CONFIG_CHIP_NAME == 1
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CHIP_NAME("Onboard PCI")
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#endif
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.enable_dev = onboard_enable,
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};
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@ -72,6 +72,7 @@ struct device {
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unsigned int initialized : 1; /* set if we have initialized the device */
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unsigned int have_resources : 1; /* Set if we have read the devices resources */
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unsigned int on_mainboard : 1;
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unsigned long rom_address;
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uint8_t command;
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