GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

sb/intel/ibexpeak: Align to coreboot's coding style 

Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical.

Change-Id: I30512ef7ff7eb091e1f880c43a0a9ecf8625a710
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46530
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-17 18:39:04 +02:00 committed by Patrick Georgi
parent e26e9b556d
commit 77f340a707
7 changed files with 92 additions and 92 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/southbridge/intel/ibexpeak/early_usb.c
View File

@ -35,21 +35,24 @@ void early_usb_init(const struct southbridge_usb_port *portmap)
RCBA32(0x3598) = 0;
reg32 = 0;
for (i = 0; i < TOTAL_USB_PORTS; i++)
for (i = 0; i < TOTAL_USB_PORTS; i++) {
if (!portmap[i].enabled)
reg32 |= (1 << i);
}
RCBA32(USBPDO) = reg32;
reg32 = 0;
/* The OC pins of the first 8 USB ports are mapped in USBOCM1 */
for (i = 0; i < 8; i++)
for (i = 0; i < 8; i++) {
if (portmap[i].enabled && portmap[i].oc_pin >= 0)
reg32 |= (1 << (i + 8 * portmap[i].oc_pin));
}
RCBA32(USBOCM1) = reg32;
reg32 = 0;
/* The OC pins of the remainder 6 USB ports are mapped in USBOCM2 */
for (i = 8; i < TOTAL_USB_PORTS; i++)
for (i = 8; i < TOTAL_USB_PORTS; i++) {
if (portmap[i].enabled && portmap[i].oc_pin >= 4)
reg32 |= (1 << (i - 8 + 8 * (portmap[i].oc_pin - 4)));
}
RCBA32(USBOCM2) = reg32;
/* Relock registers. */

31
src/southbridge/intel/ibexpeak/lpc.c
View File

@ -89,12 +89,13 @@ static void pch_enable_serial_irqs(struct device *dev)
static void pch_pirq_init(struct device *dev)
{
struct device *irq_dev;
/* Interrupt 11 is not used by legacy devices and so can always be used for
PCI interrupts. Full legacy IRQ routing is complicated and hard to
get right. Fortunately all modern OS use MSI and so it's not that big of
an issue anyway. Still we have to provide a reasonable default. Using
interrupt 11 for it everywhere is a working default. ACPI-aware OS can
move it to any interrupt and others will just leave them at default.
/*
* Interrupt 11 is not used by legacy devices and so can always be used for
* PCI interrupts. Full legacy IRQ routing is complicated and hard to
* get right. Fortunately all modern OS use MSI and so it's not that big of
* an issue anyway. Still we have to provide a reasonable default. Using
* interrupt 11 for it everywhere is a working default. ACPI-aware OS can
* move it to any interrupt and others will just leave them at default.
*/
const u8 pirq_routing = 11;
@ -288,13 +289,11 @@ static void mobile5_pm_init(struct device *dev)
RCBA32(0x1e84) = 0x000200f0;
(void)RCBA32(0x1e84);
const u32 rcba2010[] =
{
const u32 rcba2010[] = {
/* 2010: */ 0x00188200, 0x14000016, 0xbc4abcb5, 0x00000000,
/* 2020: */ 0xf0c9605b, 0x13683040, 0x04c8f16e, 0x09e90170
};
for (i = 0; i < ARRAY_SIZE(rcba2010); i++)
{
for (i = 0; i < ARRAY_SIZE(rcba2010); i++) {
RCBA32(0x2010 + 4 * i) = rcba2010[i];
RCBA32(0x2010 + 4 * i);
}
@ -320,8 +319,7 @@ static void mobile5_pm_init(struct device *dev)
RCBA32(0x2208) = 0x00003457;
(void)RCBA32(0x2208);
const u32 rcba2210[] =
{
const u32 rcba2210[] = {
/* 2210 */ 0x00000000, 0x00000001, 0xa0fff210, 0x0000df00,
/* 2220 */ 0x00e30880, 0x00000070, 0x00004000, 0x00000000,
/* 2230 */ 0x00e30880, 0x00000070, 0x00004000, 0x00000000,
@ -331,21 +329,18 @@ static void mobile5_pm_init(struct device *dev)
/* 2270 */ 0x00001c01, 0x16000000, 0x00010107, 0x00160000
};
for (i = 0; i < ARRAY_SIZE(rcba2210); i++)
{
for (i = 0; i < ARRAY_SIZE(rcba2210); i++) {
RCBA32(0x2210 + 4 * i) = rcba2210[i];
RCBA32(0x2210 + 4 * i);
}
const u32 rcba2300[] =
{
const u32 rcba2300[] = {
/* 2300: */ 0x00000000, 0x40000000, 0x4646827b, 0x6e803131,
/* 2310: */ 0x32c77887, 0x00077733, 0x00007447, 0x00000040,
/* 2320: */ 0xcccc0cfc, 0x0fbb0fff
};
for (i = 0; i < ARRAY_SIZE(rcba2300); i++)
{
for (i = 0; i < ARRAY_SIZE(rcba2300); i++) {
RCBA32(0x2300 + 4 * i) = rcba2300[i];
RCBA32(0x2300 + 4 * i);
}

9
src/southbridge/intel/ibexpeak/me.c
View File

@ -261,9 +261,8 @@ static int mei_recv_msg(struct mei_header *mei, struct mkhi_header *mkhi,
udelay(ME_DELAY);
}
if (!n) {
printk(BIOS_ERR, "ME: timeout waiting for data: expected "
"%u, available %u\n", expected,
me.buffer_write_ptr - me.buffer_read_ptr);
printk(BIOS_ERR, "ME: timeout waiting for data: expected %u, available %u\n",
expected, me.buffer_write_ptr - me.buffer_read_ptr);
return -1;
}
@ -298,8 +297,8 @@ static int mei_recv_msg(struct mei_header *mei, struct mkhi_header *mkhi,
/* Make sure caller passed a buffer with enough space */
if (ndata != (rsp_bytes >> 2)) {
printk(BIOS_ERR, "ME: not enough room in response buffer: "
"%u != %u\n", ndata, rsp_bytes >> 2);
printk(BIOS_ERR, "ME: not enough room in response buffer: %u != %u\n",
ndata, rsp_bytes >> 2);
return -1;
}

5
src/southbridge/intel/ibexpeak/smihandler.c
View File

@ -131,7 +131,10 @@ void southbridge_smi_monitor(void)
}
printk(BIOS_DEBUG, " trapped io address = 0x%x\n", trap_cycle & 0xfffc);
for (i=0; i < 4; i++) if (IOTRAP(i)) printk(BIOS_DEBUG, " TRAP = %d\n", i);
for (i = 0; i < 4; i++) {
if (IOTRAP(i))
printk(BIOS_DEBUG, " TRAP = %d\n", i);
}
printk(BIOS_DEBUG, " AHBE = %x\n", (trap_cycle >> 16) & 0xf);
printk(BIOS_DEBUG, " MASK = 0x%08x\n", mask);
printk(BIOS_DEBUG, " read/write: %s\n", (trap_cycle & (1 << 24)) ? "read" : "write");