mb/siemens/mc_apl1: Disable all UHS-I SD-Card speed modes
The limitation for SD-Card was originally only made for mc_apl2 mainboard. Since other mc_apl mainboards also use the SD-Card interface, the speed mode setting is made in the parent mainboard_final. In additional, all UHS-I bus speed modes are disabled because of a limitation for industry use cases. This means that only HS mode is permitted. Change-Id: I2f1b51f13a53c2507c52d6a169d6384b8570b3bc Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34377 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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@ -83,6 +83,10 @@
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#define SPI_REG_OPMENU_L 0xa8
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#define SPI_REG_OPMENU_L 0xa8
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#define SPI_REG_OPMENU_H 0xac
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#define SPI_REG_OPMENU_H 0xac
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#define SD_CAP_BYP 0x810
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#define SD_CAP_BYP_EN 0x5A
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#define SD_CAP_BYP_REG1 0x814
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/** \brief This function can decide if a given MAC address is valid or not.
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/** \brief This function can decide if a given MAC address is valid or not.
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* Currently, addresses filled with 0xff or 0x00 are not valid.
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* Currently, addresses filled with 0xff or 0x00 are not valid.
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* @param mac Buffer to the MAC address to check
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* @param mac Buffer to the MAC address to check
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@ -265,6 +269,21 @@ static void mainboard_final(void *chip_info)
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((SPI_OPTYPE << 16) | SPI_OPPREFIX));
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((SPI_OPTYPE << 16) | SPI_OPPREFIX));
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write32((spi_base + SPI_REG_OPMENU_L), SPI_OPMENU_LOWER);
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write32((spi_base + SPI_REG_OPMENU_L), SPI_OPMENU_LOWER);
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write32((spi_base + SPI_REG_OPMENU_H), SPI_OPMENU_UPPER);
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write32((spi_base + SPI_REG_OPMENU_H), SPI_OPMENU_UPPER);
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/* Set SD-Card speed to HS mode only. */
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dev = pcidev_path_on_root(PCH_DEVFN_SDCARD);
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if (dev) {
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uint32_t reg;
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struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (!res)
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return;
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write32(res2mmio(res, SD_CAP_BYP, 0), SD_CAP_BYP_EN);
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reg = read32(res2mmio(res, SD_CAP_BYP_REG1, 0));
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/* Disable all UHS-I SD-Card speed modes, keep only HS mode. */
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reg &= ~0x2000f800;
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write32(res2mmio(res, SD_CAP_BYP_REG1, 0), reg);
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}
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}
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}
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/* The following function performs board specific things. */
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/* The following function performs board specific things. */
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@ -26,10 +26,6 @@
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#include <soc/pci_devs.h>
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#include <soc/pci_devs.h>
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#include <types.h>
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#include <types.h>
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#define SD_CAP_BYP 0x810
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#define SD_CAP_BYP_EN 0x5A
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#define SD_CAP_BYP_REG1 0x814
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void variant_mainboard_final(void)
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void variant_mainboard_final(void)
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{
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{
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struct device *dev;
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struct device *dev;
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@ -42,21 +38,6 @@ void variant_mainboard_final(void)
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cmd |= PCI_COMMAND_MASTER;
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cmd |= PCI_COMMAND_MASTER;
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pci_write_config16(dev, PCI_COMMAND, cmd);
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pci_write_config16(dev, PCI_COMMAND, cmd);
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}
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}
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/* Reduce SD-Card speed to DDR50 because of PCB constraints. */
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dev = pcidev_path_on_root(PCH_DEVFN_SDCARD);
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if (dev) {
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uint32_t reg;
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struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (!res)
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return;
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write32(res2mmio(res, SD_CAP_BYP, 0), SD_CAP_BYP_EN);
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reg = read32(res2mmio(res, SD_CAP_BYP_REG1, 0));
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/* Disable HS400 and SDR104, keep SDR50 and DDR50 modes. */
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reg &= ~0x20005800;
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write32(res2mmio(res, SD_CAP_BYP_REG1, 0), reg);
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}
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}
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}
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static void wait_for_legacy_dev(void *unused)
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static void wait_for_legacy_dev(void *unused)
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