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soc/amd/common/cpu/noncar/cpu: rename get_smee_reserved_address_bits 

Rename get_smee_reserved_address_bits to get_sme_reserved_address_bits
since the feature is called secure memory encryption and the last 'e' in
SMEE bit in the SYSCFG MSR just stands for enable. The function will
return a valid number of reserved address bits no matter if this is
enabled or not, so drop the second 'e'.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3795f7a861e39cb6c8209fee10191f233cbcd308
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75766
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Felix Held 2023-06-12 17:11:14 +02:00
parent 6b89089b0c
commit 7866166fb4
1 changed files with 2 additions and 2 deletions
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4
src/soc/amd/common/block/cpu/noncar/cpu.c
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@ -35,7 +35,7 @@ void set_cstate_io_addr(void)
wrmsr(MSR_CSTATE_ADDRESS, cst_addr);
}
static uint32_t get_smee_reserved_address_bits(void)
static uint32_t get_sme_reserved_address_bits(void)
{
if (rdmsr(SYSCFG_MSR).raw & SYSCFG_MSR_SMEE)
return (cpuid_ebx(CPUID_EBX_MEM_ENCRYPT) &
@ -47,5 +47,5 @@ static uint32_t get_smee_reserved_address_bits(void)
uint32_t get_usable_physical_address_bits(void)
{
return cpu_phys_address_size() - get_smee_reserved_address_bits();
return cpu_phys_address_size() - get_sme_reserved_address_bits();
}