Miscellaneous AMD F14 warning fixes
This commit adds in some more fixes to AMD F14 compile warnings. The change in the mtrr.c file is in prep- aration for changes yet to com, but it is currently innocuous. Change-Id: I6b204fe0af16a97d982f46f0dfeaccc4b8eb883e Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Signed-off-by: efdesign98 <efdesign98@gmail.com> Reviewed-on: http://review.coreboot.org/133 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -19,6 +19,10 @@ config UDELAY_TSC
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bool
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default n
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config UDELAY_TIMER2
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bool
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default n
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config TSC_CALIBRATE_WITH_IO
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bool
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default n
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@ -42,5 +42,7 @@ void wait_all_other_cores_started(u32 bsp_apicid);
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void wait_all_aps_started(u32 bsp_apicid);
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void allow_all_aps_stop(u32 bsp_apicid);
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#endif
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void get_bus_conf(void);
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u32 get_initial_apicid(void);
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#endif /* CPU_AMD_FAM14_H */
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@ -27,8 +27,12 @@
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#define TOP_MEM_MSR 0xC001001A
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#define TOP_MEM2_MSR 0xC001001D
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#define TOP_MEM TOP_MEM_MSR
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#define TOP_MEM2 TOP_MEM2_MSR
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#ifndef TOP_MEM
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#define TOP_MEM TOP_MEM_MSR
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#endif
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#ifndef TOP_MEM2
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#define TOP_MEM2 TOP_MEM2_MSR
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#endif
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#define TOP_MEM_MASK 0x007fffff
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#define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10)
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@ -20,6 +20,8 @@
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#ifndef PC80_I8254_H
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#define PC80_I8254_H
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void setup_i8254(void);
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/* Ports for the 8254 timer chip */
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#define TIMER0_PORT 0x40
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#define TIMER1_PORT 0x41
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