Create a a new configuration variable for PCI
Not all architectures have PCI. This new config variable allows control of whether PCI support is configued in. It is selected for ARCH_X86. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Change-Id: Ic5fe777b14fd6a16ba605ada1e22acf3e8a2c783 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/1947 Tested-by: build bot (Jenkins)
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@ -203,6 +203,11 @@ source src/mainboard/Kconfig
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config ARCH_X86
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bool
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default n
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select PCI
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config ARCH_ARM
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bool
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default n
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config ARCH_ARMV7
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bool
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@ -175,28 +175,38 @@ config MULTIPLE_VGA_ADAPTERS
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bool
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default n
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config PCI
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bool
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default n
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config PCI_64BIT_PREF_MEM
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bool
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depends on PCI
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default n
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config HYPERTRANSPORT_PLUGIN_SUPPORT
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bool
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depends on PCI
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default n
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config PCIX_PLUGIN_SUPPORT
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bool
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depends on PCI
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default y
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config PCIEXP_PLUGIN_SUPPORT
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bool
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depends on PCI
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default y
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config AGP_PLUGIN_SUPPORT
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bool
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depends on PCI
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default y
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config CARDBUS_PLUGIN_SUPPORT
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bool
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depends on PCI
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default y
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config PCIEXP_COMMON_CLOCK
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@ -2,14 +2,14 @@ ramstage-y += device.c
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ramstage-y += root_device.c
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ramstage-y += cpu_device.c
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ramstage-y += device_util.c
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ramstage-y += pci_device.c
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ramstage-$(CONFIG_PCI) += pci_device.c
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ramstage-$(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT) += hypertransport.c
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ramstage-$(CONFIG_PCIX_PLUGIN_SUPPORT) += pcix_device.c
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ramstage-y += pciexp_device.c
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ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c
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ramstage-$(CONFIG_AGP_PLUGIN_SUPPORT) += agp_device.c
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ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c
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ramstage-y += pnp_device.c
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ramstage-y += pci_ops.c
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ramstage-$(CONFIG_ARCH_X86) += pnp_device.c
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ramstage-$(CONFIG_PCI) += pci_ops.c
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ramstage-y += smbus_ops.c
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romstage-y+= device_romstage.c
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@ -756,11 +756,10 @@ struct device_operations default_pci_ops_bus = {
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*/
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static struct device_operations *get_pci_bridge_ops(device_t dev)
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{
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unsigned int pos;
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#if CONFIG_PCIX_PLUGIN_SUPPORT
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pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
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if (pos) {
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unsigned int pcixpos;
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pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
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if (pcixpos) {
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printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev));
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return &default_pcix_ops_bus;
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}
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@ -769,10 +768,10 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
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/* How do I detect a PCI to AGP bridge? */
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#endif
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#if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT
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pos = 0;
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while ((pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos))) {
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unsigned int htpos = 0;
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while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) {
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u16 flags;
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flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
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flags = pci_read_config16(dev, htpos + PCI_CAP_FLAGS);
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if ((flags >> 13) == 1) {
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/* Host or Secondary Interface */
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printk(BIOS_DEBUG, "%s subordinate bus HT\n",
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@ -782,10 +781,11 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
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}
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#endif
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#if CONFIG_PCIEXP_PLUGIN_SUPPORT
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pos = pci_find_capability(dev, PCI_CAP_ID_PCIE);
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if (pos) {
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unsigned int pciexpos;
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pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE);
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if (pciexpos) {
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u16 flags;
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flags = pci_read_config16(dev, pos + PCI_EXP_FLAGS);
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flags = pci_read_config16(dev, pciexpos + PCI_EXP_FLAGS);
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switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) {
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case PCI_EXP_TYPE_ROOT_PORT:
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case PCI_EXP_TYPE_UPSTREAM:
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