From 78b0e7f0821ebb2ac0d616aa626f90352e231612 Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Fri, 11 Jun 2021 18:00:02 +0200
Subject: [PATCH] soc/amd/common/pi/agesawrapper: use IOAPIC ID defines
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Part of the soc/amd/stoneyridge code already uses the FCH_IOAPIC_ID and
GNB_IOAPIC_ID defines. Use those defines in the remaining location to
make sure that the IOAPIC IDs are always consistent between the hardware
register, the MADT and the IVRS ACPI tables.

TEST=Timeless build of amd/gardenia results in identical binary.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I410a6560de66889b153c8a66b8dc5474ac114ba7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
---
 src/soc/amd/common/block/pi/agesawrapper.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index ff52fbd8c8..ca576bad99 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -7,6 +7,7 @@
 #include <amdblocks/s3_resume.h>
 #include <amdblocks/agesawrapper.h>
 #include <amdblocks/BiosCallOuts.h>
+#include <amdblocks/ioapic.h>
 #include <soc/pci_devs.h>
 #include <soc/northbridge.h>
 #include <soc/cpu.h>
@@ -261,9 +262,8 @@ static AGESA_STATUS amd_init_late(AMD_LATE_PARAMS *LateParams)
 
 	const struct device *dev = pcidev_path_on_root(IOMMU_DEVFN);
 	if (dev && dev->enabled) {
-		LateParams->GnbLateConfiguration.GnbIoapicId = CONFIG_MAX_CPUS
-									+ 1;
-		LateParams->GnbLateConfiguration.FchIoapicId = CONFIG_MAX_CPUS;
+		LateParams->GnbLateConfiguration.GnbIoapicId = GNB_IOAPIC_ID;
+		LateParams->GnbLateConfiguration.FchIoapicId = FCH_IOAPIC_ID;
 	}
 
 	timestamp_add_now(TS_AGESA_INIT_LATE_START);