more warnings gone...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
527aedc17b
commit
78b4033584
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@ -290,7 +290,7 @@ void do_vsmbios(void)
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if ((unsigned int)cbfs_load_stage("vsa") != VSA2_ENTRY_POINT) {
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printk_err("do_vsmbios: Failed to load VSA.\n");
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}
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buf = VSA2_BUFFER;
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buf = (unsigned char *)VSA2_BUFFER;
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printk_debug("buf %p *buf %d buf[256k] %d\n",
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buf, buf[0], buf[SMM_SIZE * 1024]);
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printk_debug("buf[0x20] signature is %x:%x:%x:%x\n",
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@ -501,15 +501,15 @@ int biosint(unsigned long intnumber,
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printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
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ebp, esp, edi, esi);
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printk_debug("biosint: ip 0x%x cs 0x%x flags 0x%x\n",
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ip, cs, flags);
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(u32)ip, (u32)cs, (u32)flags);
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printk_debug("biosint: gs 0x%x fs 0x%x ds 0x%x es 0x%x\n",
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gsfs >> 16, gsfs & 0xffff, dses >> 16, dses & 0xffff);
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(u16)(gsfs >> 16), (u16)(gsfs & 0xffff), (u16)(dses >> 16), (u16)(dses & 0xffff));
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// cases in a good compiler are just as good as your own tables.
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switch (intnumber) {
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case 0 ... 15:
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// These are not BIOS service, but the CPU-generated exceptions
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printk_info("biosint: Oops, exception %u\n", intnumber);
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printk_info("biosint: Oops, exception 0x%x\n", (u32)intnumber);
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if (esp < 0x1000) {
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printk_debug("Stack contents: ");
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while (esp < 0x1000) {
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@ -537,7 +537,7 @@ int biosint(unsigned long intnumber,
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&ebx, &edx, &ecx, &eax, &flags);
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break;
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default:
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printk_info("BIOSINT: Unsupport int #0x%x\n", intnumber);
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printk_info("BIOSINT: Unsupported int #0x%x\n", (u32)intnumber);
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break;
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}
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if (ret)
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@ -617,16 +617,7 @@ pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp,
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unsigned long *pesp, unsigned long *pebx, unsigned long *pedx,
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unsigned long *pecx, unsigned long *peax, unsigned long *pflags)
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{
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unsigned long edi = *pedi;
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unsigned long esi = *pesi;
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unsigned long ebp = *pebp;
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unsigned long esp = *pesp;
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unsigned long ebx = *pebx;
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unsigned long edx = *pedx;
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unsigned long ecx = *pecx;
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unsigned long eax = *peax;
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unsigned long flags = *pflags;
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unsigned short func = (unsigned short)eax;
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unsigned short func = (unsigned short)*peax;
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int retval = 0;
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unsigned short devid, vendorid, devfn;
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short devindex; /* Use short to get rid of gabage in upper half of 32-bit register */
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@ -740,7 +731,7 @@ int handleint21(unsigned long *edi, unsigned long *esi, unsigned long *ebp,
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unsigned long *ecx, unsigned long *eax, unsigned long *flags)
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{
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int res = -1;
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printk_debug("handleint21, eax 0x%x\n", *eax);
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printk_debug("handleint21, eax 0x%x\n", (u32)*eax);
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switch (*eax & 0xffff) {
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case 0x5f19:
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break;
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@ -253,16 +253,16 @@ void print_conf(void)
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}
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iol = inl(GPIO_IO_BASE + GPIOL_INPUT_ENABLE);
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printk_debug("IOR 0x%08X is now 0x%08X\n",
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printk_debug("IOR 0x%08X is now 0x%08lX\n",
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GPIO_IO_BASE + GPIOL_INPUT_ENABLE, iol);
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iol = inl(GPIOL_EVENTS_ENABLE);
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printk_debug("IOR 0x%08X is now 0x%08X\n",
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printk_debug("IOR 0x%08X is now 0x%08lX\n",
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GPIO_IO_BASE + GPIOL_EVENTS_ENABLE, iol);
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iol = inl(GPIOL_INPUT_INVERT_ENABLE);
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printk_debug("IOR 0x%08X is now 0x%08X\n",
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printk_debug("IOR 0x%08X is now 0x%08lX\n",
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GPIO_IO_BASE + GPIOL_INPUT_INVERT_ENABLE, iol);
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iol = inl(GPIO_MAPPER_X);
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printk_debug("IOR 0x%08X is now 0x%08X\n", GPIO_IO_BASE + GPIO_MAPPER_X,
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printk_debug("IOR 0x%08X is now 0x%08lX\n", GPIO_IO_BASE + GPIO_MAPPER_X,
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iol);
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#endif //CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_ERR
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}
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@ -107,7 +107,7 @@ static void writeglmsr(struct gliutable *gl)
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msr.lo = gl->lo;
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msr.hi = gl->hi;
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wrmsr(gl->desc_name, msr); // MSR - see table above
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printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); // GX3
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printk_debug("%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo); // GX3
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}
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static void ShadowInit(struct gliutable *gl)
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@ -147,7 +147,7 @@ static void SysmemInit(struct gliutable *gl)
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msr.lo = sizebytes;
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wrmsr(gl->desc_name, msr); // MSR - see table above
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printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__,
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printk_debug("%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __func__,
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gl->desc_name, msr.hi, msr.lo);
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}
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@ -173,7 +173,7 @@ static void SMMGL0Init(struct gliutable *gl)
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msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff;
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wrmsr(gl->desc_name, msr); // MSR - See table above
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printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__,
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printk_debug("%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __func__,
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gl->desc_name, msr.hi, msr.lo);
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}
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@ -190,7 +190,7 @@ static void SMMGL1Init(struct gliutable *gl)
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msr.lo |= ((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff;
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wrmsr(gl->desc_name, msr); // MSR - See table above
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printk_debug("%s: MSR 0x%08x, val 0x%08x:0x%08x\n", __func__,
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printk_debug("%s: MSR 0x%08lx, val 0x%08x:0x%08x\n", __func__,
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gl->desc_name, msr.hi, msr.lo);
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}
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@ -27,12 +27,13 @@ static const unsigned char NumColAddr[] = {
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0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
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};
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void banner(char *s)
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void banner(const char *s)
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{
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print_debug("===========================");
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print_debug(s);
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print_debug("======================================\r\n");
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}
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void hcf(void)
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{
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print_emerg("DIE\r\n");
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@ -35,7 +35,7 @@
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#include "cs5536.h"
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struct msrinit {
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uint32_t msrnum;
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u32 msrnum;
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msr_t msr;
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};
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@ -61,8 +61,8 @@ struct msrinit CS5536_CLOCK_GATING_TABLE[] = {
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};
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struct acpiinit {
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uint16_t ioreg;
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uint32_t regdata;
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u16 ioreg;
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u32 regdata;
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};
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struct acpiinit acpi_init_table[] = {
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@ -95,7 +95,7 @@ struct FLASH_DEVICE FlashInitTable[] = {
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#define FlashInitTableLen (ARRAY_SIZE(FlashInitTable))
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uint32_t FlashPort[] = {
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u32 FlashPort[] = {
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MDD_LBAR_FLSH0,
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MDD_LBAR_FLSH1,
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MDD_LBAR_FLSH2,
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@ -111,8 +111,8 @@ uint32_t FlashPort[] = {
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/* ***************************************************************************/
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static void pmChipsetInit(void)
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{
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uint32_t val = 0;
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uint16_t port;
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u32 val = 0;
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u16 port;
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port = (PMS_IO_BASE + 0x010);
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val = 0x0E00; /* 1ms */
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@ -427,7 +427,7 @@ static void uarts_init(struct southbridge_amd_cs5536_config *sb)
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static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
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{
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uint8_t *bar;
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u32 bar;
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msr_t msr;
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device_t dev;
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@ -443,7 +443,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
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/* write to clear diag register */
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wrmsr(USB2_SB_GLD_MSR_DIAG, rdmsr(USB2_SB_GLD_MSR_DIAG));
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bar = (uint8_t *) pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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/* Make HCCPARAMS writeable */
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write32(bar + IPREG04, read32(bar + IPREG04) | USB_HCCPW_SET);
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@ -455,7 +455,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
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dev = dev_find_device(PCI_VENDOR_ID_AMD,
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PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
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if (dev) {
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bar = (uint8_t *) pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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write32(bar + UOCMUX, read32(bar + UOCMUX) & PUEN_SET);
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@ -483,8 +483,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
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dev = dev_find_device(PCI_VENDOR_ID_AMD,
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PCI_DEVICE_ID_AMD_CS5536_UDC, 0);
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if (dev) {
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bar = (uint8_t *) pci_read_config32(dev,
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PCI_BASE_ADDRESS_0);
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bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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write32(bar + UDCDEVCTL,
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read32(bar + UDCDEVCTL) | UDC_SD_SET);
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@ -493,8 +492,7 @@ static void enable_USB_port4(struct southbridge_amd_cs5536_config *sb)
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dev = dev_find_device(PCI_VENDOR_ID_AMD,
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PCI_DEVICE_ID_AMD_CS5536_OTG, 0);
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if (dev) {
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bar = (uint8_t *) pci_read_config32(dev,
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PCI_BASE_ADDRESS_0);
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bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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write32(bar + UOCCTL, read32(bar + UOCCTL) | PADEN_SET);
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write32(bar + UOCCAP, read32(bar + UOCCAP) | APU_SET);
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}
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@ -524,7 +522,7 @@ void chipsetinit(void)
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{
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device_t dev;
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msr_t msr;
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uint32_t msrnum;
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u32 msrnum;
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struct southbridge_amd_cs5536_config *sb =
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(struct southbridge_amd_cs5536_config *)dev->chip_info;
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struct msrinit *csi;
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@ -32,13 +32,11 @@ static void cs5536_setup_extmsr(void)
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/* forward MSR access to CS5536_GLINK_PORT_NUM to CS5536_DEV_NUM */
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msr.hi = msr.lo = 0x00000000;
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if (CS5536_GLINK_PORT_NUM <= 4) {
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msr.lo = CS5536_DEV_NUM <<
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(unsigned char)((CS5536_GLINK_PORT_NUM - 1) * 8);
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} else {
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msr.hi = CS5536_DEV_NUM <<
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(unsigned char)((CS5536_GLINK_PORT_NUM - 5) * 8);
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}
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#if CS5536_GLINK_PORT_NUM <= 4
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msr.lo = CS5536_DEV_NUM << (unsigned char)((CS5536_GLINK_PORT_NUM - 1) * 8);
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#else
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msr.hi = CS5536_DEV_NUM << (unsigned char)((CS5536_GLINK_PORT_NUM - 5) * 8);
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#endif
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wrmsr(GLPCI_ExtMSR, msr);
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}
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@ -30,7 +30,7 @@
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#define HDA_ICII_BUSY (1 << 0)
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#define HDA_ICII_VALID (1 << 1)
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static int set_bits(u8 * port, u32 mask, u32 val)
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static int set_bits(u32 port, u32 mask, u32 val)
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{
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u32 dword;
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int count;
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@ -59,7 +59,7 @@ static int set_bits(u8 * port, u32 mask, u32 val)
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return 0;
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}
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static u32 codec_detect(u8 * base)
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static u32 codec_detect(u32 base)
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{
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u32 dword;
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@ -172,7 +172,7 @@ static u32 find_verb(u32 viddid, u32 ** verb)
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* no response would imply that the codec is non-operative
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*/
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static int wait_for_ready(u8 *base)
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static int wait_for_ready(u32 base)
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{
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/* Use a 50 usec timeout - the Linux kernel uses the
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* same duration */
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@ -195,7 +195,7 @@ static int wait_for_ready(u8 *base)
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* is non-operative
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*/
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static int wait_for_valid(u8 *base)
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static int wait_for_valid(u32 base)
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{
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/* Use a 50 usec timeout - the Linux kernel uses the
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* same duration */
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@ -212,7 +212,7 @@ static int wait_for_valid(u8 *base)
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return 1;
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}
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static void codec_init(u8 * base, int addr)
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static void codec_init(u32 base, int addr)
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{
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u32 dword;
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u32 *verb;
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@ -254,7 +254,7 @@ static void codec_init(u8 * base, int addr)
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printk_debug("verb loaded!\n");
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}
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static void codecs_init(u8 * base, u32 codec_mask)
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static void codecs_init(u32 base, u32 codec_mask)
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{
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int i;
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for (i = 2; i >= 0; i--) {
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@ -267,7 +267,7 @@ static void hda_init(struct device *dev)
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{
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u8 byte;
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u32 dword;
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u8 *base;
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u32 base;
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struct resource *res;
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u32 codec_mask;
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device_t sm_dev;
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@ -301,8 +301,8 @@ static void hda_init(struct device *dev)
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if (!res)
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return;
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base = (u8 *) ((u32)res->base);
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printk_debug("base = %p\n", base);
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base = ((u32)res->base);
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printk_debug("base = 0x%x\n", base);
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codec_mask = codec_detect(base);
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if (codec_mask) {
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@ -27,7 +27,7 @@
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#include <arch/io.h>
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#include "sb600.h"
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int sata_drive_detect(int portnum, u16 iobar)
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static int sata_drive_detect(int portnum, u16 iobar)
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{
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u8 byte, byte2;
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int i = 0;
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@ -59,7 +59,7 @@ static void sata_init(struct device *dev)
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u8 byte;
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u16 word;
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u32 dword;
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u8 *sata_bar5;
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u32 sata_bar5;
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u16 sata_bar0, sata_bar1, sata_bar2, sata_bar3, sata_bar4;
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int i, j;
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@ -84,7 +84,7 @@ static void sata_init(struct device *dev)
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pci_write_config8(sm_dev, 0xaf, byte);
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/* get base addresss */
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sata_bar5 = (u8 *) (pci_read_config32(dev, 0x24) & ~0x3FF);
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sata_bar5 = pci_read_config32(dev, 0x24) & ~0x3FF;
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sata_bar0 = pci_read_config16(dev, 0x10) & ~0x7;
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sata_bar1 = pci_read_config16(dev, 0x14) & ~0x3;
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sata_bar2 = pci_read_config16(dev, 0x18) & ~0x7;
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@ -96,7 +96,7 @@ static void sata_init(struct device *dev)
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printk_spew("sata_bar2=%x\n", sata_bar2); /* 3040 */
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printk_spew("sata_bar3=%x\n", sata_bar3); /* 3080 */
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printk_spew("sata_bar4=%x\n", sata_bar4); /* 3000 */
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printk_spew("sata_bar5=%p\n", sata_bar5); /* e0309000 */
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printk_spew("sata_bar5=%x\n", sata_bar5); /* e0309000 */
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/* Program the 2C to 0x43801002 */
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dword = 0x43801002;
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@ -88,13 +88,13 @@ static void usb_init2(struct device *dev)
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u8 byte;
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u16 word;
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u32 dword;
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u8 *usb2_bar0;
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u32 usb2_bar0;
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/* dword = pci_read_config32(dev, 0xf8); */
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/* dword |= 40; */
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/* pci_write_config32(dev, 0xf8, dword); */
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usb2_bar0 = (u8 *) (pci_read_config32(dev, 0x10) & ~0xFF);
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printk_info("usb2_bar0=%p\n", usb2_bar0);
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usb2_bar0 = pci_read_config32(dev, 0x10) & ~0xFF;
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printk_info("usb2_bar0=0x%x\n", usb2_bar0);
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|
||||
/* RPR5.4 Enables the USB PHY auto calibration resister to match 45ohm resistence */
|
||||
dword = 0x00020F00;
|
||||
|
|
|
@ -30,7 +30,7 @@
|
|||
#define HDA_ICII_BUSY (1 << 0)
|
||||
#define HDA_ICII_VALID (1 << 1)
|
||||
|
||||
static int set_bits(u8 * port, u32 mask, u32 val)
|
||||
static int set_bits(u32 port, u32 mask, u32 val)
|
||||
{
|
||||
u32 dword;
|
||||
int count;
|
||||
|
@ -59,7 +59,7 @@ static int set_bits(u8 * port, u32 mask, u32 val)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static u32 codec_detect(u8 * base)
|
||||
static u32 codec_detect(u32 base)
|
||||
{
|
||||
u32 dword;
|
||||
|
||||
|
@ -94,7 +94,7 @@ no_codec:
|
|||
* Wait 50usec for for the codec to indicate it is ready
|
||||
* no response would imply that the codec is non-operative
|
||||
*/
|
||||
static int wait_for_ready(u8 *base)
|
||||
static int wait_for_ready(u32 base)
|
||||
{
|
||||
/* Use a 50 usec timeout - the Linux kernel uses the
|
||||
* same duration */
|
||||
|
@ -116,7 +116,7 @@ static int wait_for_ready(u8 *base)
|
|||
* the previous command. No response would imply that the code
|
||||
* is non-operative
|
||||
*/
|
||||
static int wait_for_valid(u8 *base)
|
||||
static int wait_for_valid(u32 base)
|
||||
{
|
||||
/* Use a 50 usec timeout - the Linux kernel uses the
|
||||
* same duration */
|
||||
|
@ -133,7 +133,7 @@ static int wait_for_valid(u8 *base)
|
|||
return 1;
|
||||
}
|
||||
|
||||
static void codec_init(u8 * base, int addr)
|
||||
static void codec_init(u32 base, int addr)
|
||||
{
|
||||
u32 dword;
|
||||
|
||||
|
@ -153,7 +153,7 @@ static void codec_init(u8 * base, int addr)
|
|||
printk_debug("%x(th) codec viddid: %08x\n", addr, dword);
|
||||
}
|
||||
|
||||
static void codecs_init(u8 * base, u32 codec_mask)
|
||||
static void codecs_init(u32 base, u32 codec_mask)
|
||||
{
|
||||
int i;
|
||||
for (i = 2; i >= 0; i--) {
|
||||
|
@ -166,7 +166,7 @@ static void hda_init(struct device *dev)
|
|||
{
|
||||
u8 byte;
|
||||
u32 dword;
|
||||
u8 *base;
|
||||
u32 base;
|
||||
struct resource *res;
|
||||
u32 codec_mask;
|
||||
device_t sm_dev;
|
||||
|
@ -202,8 +202,8 @@ static void hda_init(struct device *dev)
|
|||
if (!res)
|
||||
return;
|
||||
|
||||
base = (u8 *) ((u32)res->base);
|
||||
printk_debug("base = %p\n", base);
|
||||
base = (u32)res->base;
|
||||
printk_debug("base = 0x%x\n", base);
|
||||
codec_mask = codec_detect(base);
|
||||
|
||||
if (codec_mask) {
|
||||
|
|
|
@ -34,7 +34,6 @@ static void usb_init(struct device *dev)
|
|||
{
|
||||
u8 byte;
|
||||
u16 word;
|
||||
u32 dword;
|
||||
|
||||
/* 6.1 Enable OHCI0-4 and EHCI Controllers */
|
||||
device_t sm_dev;
|
||||
|
@ -70,10 +69,8 @@ static void usb_init(struct device *dev)
|
|||
|
||||
static void usb_init2(struct device *dev)
|
||||
{
|
||||
u8 byte;
|
||||
u16 word;
|
||||
u32 dword;
|
||||
u8 *usb2_bar0;
|
||||
u32 usb2_bar0;
|
||||
device_t sm_dev;
|
||||
u8 rev;
|
||||
|
||||
|
@ -84,8 +81,8 @@ static void usb_init2(struct device *dev)
|
|||
/* dword |= 40; */
|
||||
/* pci_write_config32(dev, 0xf8, dword); */
|
||||
|
||||
usb2_bar0 = (u8 *) (pci_read_config32(dev, 0x10) & ~0xFF);
|
||||
printk_info("usb2_bar0=%p\n", usb2_bar0);
|
||||
usb2_bar0 = pci_read_config32(dev, 0x10) & ~0xFF;
|
||||
printk_info("usb2_bar0=0x%x\n", usb2_bar0);
|
||||
|
||||
/* RPR6.4 Enables the USB PHY auto calibration resister to match 45ohm resistence */
|
||||
dword = 0x00020F00;
|
||||
|
@ -123,6 +120,9 @@ static void usb_init2(struct device *dev)
|
|||
/* Each step below causes the linux crashes. Leave them here
|
||||
* for future debugging. */
|
||||
#if 0
|
||||
u8 byte;
|
||||
u16 word;
|
||||
|
||||
/* RPR6.16 Disable EHCI MSI support */
|
||||
byte = pci_read_config8(dev, 0x50);
|
||||
byte |= (1 << 6);
|
||||
|
|
Loading…
Reference in New Issue