mb/google/brya: Enable EC
Perform EC initialization in bootblock and ramstages. Add associated ACPI configuration. BUG=b:174266035 TEST=Build Test Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: Ie1305706134ca7cc58b8a9941231d1ee14f80949 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48114 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Eric Lai
Tim Wawrzynczak
parent
b052c4b368
commit
78b6a1bbcd
|
|
@ -1,6 +1,8 @@
|
|||
config BOARD_GOOGLE_BASEBOARD_BRYA
|
||||
def_bool n
|
||||
select BOARD_ROMSIZE_KB_32768
|
||||
select EC_GOOGLE_CHROMEEC
|
||||
select EC_GOOGLE_CHROMEEC_ESPI
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
select INTEL_LPSS_UART_FOR_CONSOLE
|
||||
|
|
@ -16,6 +18,8 @@ config BASEBOARD_BRYA_LAPTOP
|
|||
config CHROMEOS
|
||||
bool
|
||||
default y
|
||||
select EC_GOOGLE_CHROMEEC_SWITCHES
|
||||
select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
|
||||
select VBOOT_LID_SWITCH
|
||||
|
||||
config DEVICETREE
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@ romstage-y += romstage.c
|
|||
|
||||
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
|
||||
ramstage-y += mainboard.c
|
||||
ramstage-y += ec.c
|
||||
|
||||
VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
|
||||
|
||||
|
|
|
|||
|
|
@ -16,18 +16,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
|
|||
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
|
||||
}
|
||||
|
||||
int get_lid_switch(void)
|
||||
{
|
||||
/* TODO: use Chrome EC switches when EC support is added */
|
||||
return 1;
|
||||
}
|
||||
|
||||
int get_recovery_mode_switch(void)
|
||||
{
|
||||
/* TODO: use Chrome EC switches when EC support is added */
|
||||
return 0;
|
||||
}
|
||||
|
||||
int get_write_protect_state(void)
|
||||
{
|
||||
/* No write protect */
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
|
||||
#include <acpi/acpi.h>
|
||||
#include <variant/ec.h>
|
||||
|
||||
DefinitionBlock(
|
||||
"dsdt.aml",
|
||||
|
|
@ -33,4 +34,13 @@ DefinitionBlock(
|
|||
|
||||
/* Chrome OS specific */
|
||||
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
|
||||
|
||||
/* Chrome OS Embedded Controller */
|
||||
Scope (\_SB.PCI0.LPCB)
|
||||
{
|
||||
/* ACPI code for EC SuperIO functions */
|
||||
#include <ec/google/chromeec/acpi/superio.asl>
|
||||
/* ACPI code for EC functions */
|
||||
#include <ec/google/chromeec/acpi/ec.asl>
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,22 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
|
||||
#include <acpi/acpi.h>
|
||||
#include <console/console.h>
|
||||
#include <ec/ec.h>
|
||||
#include <ec/google/chromeec/ec.h>
|
||||
#include <variant/ec.h>
|
||||
|
||||
void mainboard_ec_init(void)
|
||||
{
|
||||
static const struct google_chromeec_event_info info = {
|
||||
.log_events = MAINBOARD_EC_LOG_EVENTS,
|
||||
.sci_events = MAINBOARD_EC_SCI_EVENTS,
|
||||
.s3_wake_events = MAINBOARD_EC_S3_WAKE_EVENTS,
|
||||
.s5_wake_events = MAINBOARD_EC_S5_WAKE_EVENTS,
|
||||
.s0ix_wake_events = MAINBOARD_EC_S0IX_WAKE_EVENTS,
|
||||
};
|
||||
|
||||
printk(BIOS_ERR, "mainboard: EC init\n");
|
||||
|
||||
google_chromeec_events_init(&info, acpi_is_wakeup_s3());
|
||||
}
|
||||
|
|
@ -3,6 +3,7 @@
|
|||
#include <acpi/acpi.h>
|
||||
#include <baseboard/variants.h>
|
||||
#include <device/device.h>
|
||||
#include <ec/ec.h>
|
||||
#include <vendorcode/google/chromeos/chromeos.h>
|
||||
|
||||
static void mainboard_init(void *chip_info)
|
||||
|
|
@ -13,8 +14,14 @@ static void mainboard_init(void *chip_info)
|
|||
gpio_configure_pads(pads, num);
|
||||
}
|
||||
|
||||
static void mainboard_dev_init(struct device *dev)
|
||||
{
|
||||
mainboard_ec_init();
|
||||
}
|
||||
|
||||
static void mainboard_enable(struct device *dev)
|
||||
{
|
||||
dev->ops->init = mainboard_dev_init;
|
||||
dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,67 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
|
||||
#ifndef __BASEBOARD_EC_H__
|
||||
#define __BASEBOARD_EC_H__
|
||||
|
||||
#include <ec/ec.h>
|
||||
#include <ec/google/chromeec/ec_commands.h>
|
||||
#include <baseboard/gpio.h>
|
||||
|
||||
#define MAINBOARD_EC_SCI_EVENTS \
|
||||
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_CHARGER) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE))
|
||||
#define MAINBOARD_EC_SMI_EVENTS \
|
||||
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED))
|
||||
/* EC can wake from S5 with lid or power button */
|
||||
#define MAINBOARD_EC_S5_WAKE_EVENTS \
|
||||
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON))
|
||||
/*
|
||||
* EC can wake from S3/S0ix with:
|
||||
* 1. Lid open
|
||||
* 2. Power button
|
||||
* 3. Key press
|
||||
* 4. Mode change
|
||||
*/
|
||||
#define MAINBOARD_EC_S3_WAKE_EVENTS \
|
||||
(MAINBOARD_EC_S5_WAKE_EVENTS |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE))
|
||||
#define MAINBOARD_EC_S0IX_WAKE_EVENTS (MAINBOARD_EC_S3_WAKE_EVENTS)
|
||||
/* Log EC wake events plus EC shutdown events */
|
||||
#define MAINBOARD_EC_LOG_EVENTS \
|
||||
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) |\
|
||||
EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC))
|
||||
/*
|
||||
* ACPI related definitions for ASL code.
|
||||
*/
|
||||
/* Enable EC backed ALS device in ACPI */
|
||||
#define EC_ENABLE_ALS_DEVICE
|
||||
/* Enable Keyboard Backlight */
|
||||
#define EC_ENABLE_KEYBOARD_BACKLIGHT
|
||||
/* Enable LID switch and provide wake pin for EC */
|
||||
#define EC_ENABLE_LID_SWITCH
|
||||
#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
|
||||
/* Enable Tablet switch */
|
||||
#define EC_ENABLE_TBMC_DEVICE
|
||||
/* Enable EC backed PD MCU device in ACPI */
|
||||
#define EC_ENABLE_PD_MCU_DEVICE
|
||||
#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */
|
||||
#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */
|
||||
#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */
|
||||
|
||||
#endif /* __BASEBOARD_EC_H__ */
|
||||
|
|
@ -6,4 +6,9 @@
|
|||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
/* eSPI virtual wire reporting */
|
||||
#define EC_SCI_GPI GPE0_ESPI
|
||||
/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
|
||||
#define GPE_EC_WAKE GPE0_LAN_WAK
|
||||
|
||||
#endif /* __BASEBOARD_GPIO_H__ */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,8 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
|
||||
#ifndef MAINBOARD_EC_H
|
||||
#define MAINBOARD_EC_H
|
||||
|
||||
#include <baseboard/ec.h>
|
||||
|
||||
#endif /* MAINBOARD_GPIO_H */
|
||||
Loading…
Reference in New Issue