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soc/amd/stoneyridge/fch: use read[16,32]p to avoid typecasts 

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I6372741284ad5f0453f0d4dfd8ebaddd7385f8ea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67977
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Felix Held 2022-09-29 15:58:37 +02:00
parent 73a0d0af64
commit 78ba98a797
1 changed files with 3 additions and 5 deletions
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8
src/soc/amd/stoneyridge/fch.c
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@ -152,12 +152,10 @@ static void set_sb_gnvs(struct global_nvs *gnvs)
size_t fwsize; size_t fwsize;
amdfw_rom = 0x20000 - (0x80000 << CONFIG_AMD_FWM_POSITION_INDEX); amdfw_rom = 0x20000 - (0x80000 << CONFIG_AMD_FWM_POSITION_INDEX);
xhci_fw = read32((void *)(amdfw_rom + XHCI_FW_SIG_OFFSET)); xhci_fw = read32p(amdfw_rom + XHCI_FW_SIG_OFFSET);
fwaddr = 2 + read16((void *)(xhci_fw + XHCI_FW_ADDR_OFFSET fwaddr = 2 + read16p(xhci_fw + XHCI_FW_ADDR_OFFSET + XHCI_FW_BOOTRAM_SIZE);
+ XHCI_FW_BOOTRAM_SIZE)); fwsize = read16p(xhci_fw + XHCI_FW_SIZE_OFFSET + XHCI_FW_BOOTRAM_SIZE);
fwsize = read16((void *)(xhci_fw + XHCI_FW_SIZE_OFFSET
+ XHCI_FW_BOOTRAM_SIZE));
gnvs->fw00 = 0; gnvs->fw00 = 0;
gnvs->fw01 = ((32 * KiB) << 16) + 0; gnvs->fw01 = ((32 * KiB) << 16) + 0;
gnvs->fw02 = fwaddr + XHCI_FW_BOOTRAM_SIZE; gnvs->fw02 = fwaddr + XHCI_FW_BOOTRAM_SIZE;