Add tinybootblock support for broadcom/bcm5785.

In the bootblock, 4MB of ROM are mapped instead of the
default 1MB

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2010-05-22 15:07:15 +00:00
parent 36de0424f2
commit 78c733c2b7
4 changed files with 26 additions and 14 deletions

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@ -1,2 +1,8 @@
config SOUTHBRIDGE_BROADCOM_BCM5785
bool
select HAVE_HARD_RESET
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/broadcom/bcm5785/bootblock.c"
depends on SOUTHBRIDGE_BROADCOM_BCM5785

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@ -4,20 +4,7 @@
*/
#include <reset.h>
static void bcm5785_enable_rom(void)
{
unsigned char byte;
device_t addr;
/* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */
/* Locate the BCM 5785 SB PCI Main */
addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201?
/* Set the 4MB enable bit bit */
byte = pci_read_config8(addr, 0x41);
byte |= 0x0e;
pci_write_config8(addr, 0x41, byte);
}
#include "bcm5785_enable_rom.c"
static void bcm5785_enable_lpc(void)
{

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@ -0,0 +1,14 @@
static void bcm5785_enable_rom(void)
{
unsigned char byte;
device_t addr;
/* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */
/* Locate the BCM 5785 SB PCI Main */
addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201?
/* Set the 4MB enable bit bit */
byte = pci_read_config8(addr, 0x41);
byte |= 0x0e;
pci_write_config8(addr, 0x41, byte);
}

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@ -0,0 +1,5 @@
#include "bcm5785_enable_rom.c"
static void bootblock_southbridge_init(void) {
bcm5785_enable_rom();
}