Add tinybootblock support for broadcom/bcm5785.
In the bootblock, 4MB of ROM are mapped instead of the default 1MB Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -1,2 +1,8 @@
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config SOUTHBRIDGE_BROADCOM_BCM5785
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bool
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select HAVE_HARD_RESET
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config BOOTBLOCK_SOUTHBRIDGE_INIT
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string
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default "southbridge/broadcom/bcm5785/bootblock.c"
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depends on SOUTHBRIDGE_BROADCOM_BCM5785
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@ -4,20 +4,7 @@
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*/
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#include <reset.h>
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static void bcm5785_enable_rom(void)
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{
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unsigned char byte;
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device_t addr;
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/* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */
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/* Locate the BCM 5785 SB PCI Main */
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addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201?
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/* Set the 4MB enable bit bit */
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byte = pci_read_config8(addr, 0x41);
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byte |= 0x0e;
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pci_write_config8(addr, 0x41, byte);
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}
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#include "bcm5785_enable_rom.c"
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static void bcm5785_enable_lpc(void)
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{
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@ -0,0 +1,14 @@
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static void bcm5785_enable_rom(void)
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{
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unsigned char byte;
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device_t addr;
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/* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */
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/* Locate the BCM 5785 SB PCI Main */
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addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201?
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/* Set the 4MB enable bit bit */
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byte = pci_read_config8(addr, 0x41);
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byte |= 0x0e;
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pci_write_config8(addr, 0x41, byte);
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}
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@ -0,0 +1,5 @@
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#include "bcm5785_enable_rom.c"
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static void bootblock_southbridge_init(void) {
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bcm5785_enable_rom();
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}
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