soc/intel/apollolake: Print ME version on exit of BS_DEV_INIT stage

Recently there has been a change to print ME version. But the stage at
which the version is printed causes the HECI device to remain in D0 state.
This in turn prevents the SoC from entering S0ix state.

This change moves printing ME version a little earlier so that the HECI
device is put into D0i3 state by FSP and the SoC can enter S0ix state
successfully.

BRANCH=octopus
BUG=b:120571529
TEST=Ensure that the ME version gets printed in BIOS logs. Ensure that
the device boots to ChromeOS. Ensure that the device enters S0ix
successfully(using suspend_stress_test -c 25).

Change-Id: I85bc45003a040c8347f929457792d78a9a077c6c
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/30074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Karthikeyan Ramasubramanian 2018-12-05 22:48:08 -07:00 committed by Patrick Georgi
parent 968a23d2e0
commit 78ca711338
1 changed files with 2 additions and 3 deletions

View File

@ -195,7 +195,7 @@ static uint32_t dump_status(int index, int reg_addr)
return reg; return reg;
} }
static void dump_cse_version(void) static void dump_cse_version(void *unused)
{ {
int res; int res;
size_t reply_size; size_t reply_size;
@ -282,8 +282,6 @@ static void dump_cse_state(void)
printk(BIOS_DEBUG, "unknown"); printk(BIOS_DEBUG, "unknown");
} }
printk(BIOS_DEBUG, "\n"); printk(BIOS_DEBUG, "\n");
dump_cse_version();
} }
#define PCR_PSFX_T0_SHDW_PCIEN 0x1C #define PCR_PSFX_T0_SHDW_PCIEN 0x1C
@ -307,3 +305,4 @@ void heci_cse_lockdown(void)
} }
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, fpf_blown, NULL); BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, fpf_blown, NULL);
BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, dump_cse_version, NULL);