soc/intel/alderlake: Perform `heci_finalize` prior to booting to OS
`heci_finalize` ensures to put all heci devices to D3 by setting the D0i3 bit prior to booting to the OS. BUG=b:200644229 TEST=Verified D0i3 bit is set for all HECI devices prior to booting to OS. Signed-off-by: Subrata Banik <subrata.banik@intel.com> Change-Id: I86d5959646522f9a2169bf13ae04d88b8f685e14 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58040 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -13,6 +13,7 @@
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#include <cpu/x86/smm.h>
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#include <cpu/x86/smm.h>
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#include <device/mmio.h>
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#include <device/mmio.h>
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#include <device/pci.h>
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#include <device/pci.h>
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#include <intelblocks/cse.h>
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#include <intelblocks/lpc_lib.h>
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#include <intelblocks/lpc_lib.h>
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#include <intelblocks/pcr.h>
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#include <intelblocks/pcr.h>
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#include <intelblocks/pmclib.h>
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#include <intelblocks/pmclib.h>
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@ -90,6 +91,23 @@ static void sa_finalize(void)
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sa_lock_pam();
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sa_lock_pam();
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}
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}
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static void heci_finalize(void)
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{
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unsigned int cse_dev[] = {
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PCH_DEVFN_CSE,
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PCH_DEVFN_CSE_2,
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PCH_DEVFN_CSE_3,
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PCH_DEVFN_CSE_4
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};
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for (int i = 0; i < ARRAY_SIZE(cse_dev); i++) {
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if (!is_cse_devfn_visible(cse_dev[i]))
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continue;
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set_cse_device_state(cse_dev[i], DEV_IDLE);
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}
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}
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static void soc_finalize(void *unused)
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static void soc_finalize(void *unused)
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{
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{
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printk(BIOS_DEBUG, "Finalizing chipset.\n");
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printk(BIOS_DEBUG, "Finalizing chipset.\n");
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@ -98,6 +116,7 @@ static void soc_finalize(void *unused)
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apm_control(APM_CNT_FINALIZE);
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apm_control(APM_CNT_FINALIZE);
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tbt_finalize();
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tbt_finalize();
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sa_finalize();
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sa_finalize();
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heci_finalize();
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/* Indicate finalize step with post code */
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/* Indicate finalize step with post code */
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post_code(POST_OS_BOOT);
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post_code(POST_OS_BOOT);
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