drivers/pc80/rtc/mc146818rtc.c: Add Kconfig for RTC CMOS base addresses
Configure the CMOS bank I/O base addresses with PC_CMOS_BASE_PORT_BANK* rather than hard-coding as 0x70, 0x72. The defaults remain the same. Change-Id: Ie44e5f5191c66f44e2df8ea0ff58a860be88bfcf Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74903 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -9,3 +9,11 @@ config USE_PC_CMOS_ALTCENTURY
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depends on DRIVERS_MC146818
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depends on DRIVERS_MC146818
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help
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help
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May be useful for legacy OSes that assume its presence.
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May be useful for legacy OSes that assume its presence.
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config PC_CMOS_BASE_PORT_BANK0
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hex "Base port for CMOS bank 0 index/data registers"
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default 0x70
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config PC_CMOS_BASE_PORT_BANK1
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hex "Base port for CMOS bank 1 index/data registers"
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default 0x72
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@ -249,11 +249,11 @@ void set_boot_successful(void)
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{
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{
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uint8_t index, byte;
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uint8_t index, byte;
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index = inb(RTC_PORT(0)) & 0x80;
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index = inb(RTC_PORT_BANK0(0)) & 0x80;
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index |= RTC_BOOT_BYTE;
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index |= RTC_BOOT_BYTE;
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outb(index, RTC_PORT(0));
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outb(index, RTC_PORT_BANK0(0));
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byte = inb(RTC_PORT(1));
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byte = inb(RTC_PORT_BANK0(1));
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if (CONFIG(SKIP_MAX_REBOOT_CNT_CLEAR)) {
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if (CONFIG(SKIP_MAX_REBOOT_CNT_CLEAR)) {
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/*
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/*
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@ -269,5 +269,5 @@ void set_boot_successful(void)
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byte &= 0x0f;
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byte &= 0x0f;
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}
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}
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outb(byte, RTC_PORT(1));
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outb(byte, RTC_PORT_BANK0(1));
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}
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}
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@ -6,9 +6,10 @@
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#include <arch/io.h>
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#include <arch/io.h>
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#include <types.h>
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#include <types.h>
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#define RTC_BASE_PORT 0x70
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#define RTC_BASE_PORT_BANK0 (CONFIG_PC_CMOS_BASE_PORT_BANK0)
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#define RTC_BASE_PORT_BANK1 (CONFIG_PC_CMOS_BASE_PORT_BANK1)
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#define RTC_PORT(x) (RTC_BASE_PORT + (x))
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#define RTC_PORT_BANK0(x) (RTC_BASE_PORT_BANK0 + (x))
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/* control registers - Moto names
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/* control registers - Moto names
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*/
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*/
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@ -107,24 +108,24 @@
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static inline unsigned char cmos_read(unsigned char addr)
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static inline unsigned char cmos_read(unsigned char addr)
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{
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{
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int offs = 0;
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int port = RTC_BASE_PORT_BANK0;
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if (addr >= 128) {
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if (addr >= 128) {
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offs = 2;
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port = RTC_BASE_PORT_BANK1;
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addr -= 128;
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addr -= 128;
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}
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}
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outb(addr, RTC_BASE_PORT + offs + 0);
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outb(addr, port + 0);
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return inb(RTC_BASE_PORT + offs + 1);
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return inb(port + 1);
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}
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}
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static inline void cmos_write_inner(unsigned char val, unsigned char addr)
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static inline void cmos_write_inner(unsigned char val, unsigned char addr)
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{
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{
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int offs = 0;
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int port = RTC_BASE_PORT_BANK0;
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if (addr >= 128) {
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if (addr >= 128) {
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offs = 2;
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port = RTC_BASE_PORT_BANK1;
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addr -= 128;
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addr -= 128;
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}
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}
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outb(addr, RTC_BASE_PORT + offs + 0);
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outb(addr, port + 0);
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outb(val, RTC_BASE_PORT + offs + 1);
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outb(val, port + 1);
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}
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}
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static inline u8 cmos_disable_rtc(void)
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static inline u8 cmos_disable_rtc(void)
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