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Trivial: use the IO_APIC_ADDR constant defined in ioapic.h, and spell check 

Signed-off-by: Kerry She <kerry.she@amd.com>
Acked-by: Kerry She <kerry.she@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Kerry She 2011-01-04 06:15:46 +00:00 committed by Kerry She
parent e925965034
commit 7917f430b2
2 changed files with 2 additions and 3 deletions
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3
src/mainboard/amd/bimini_fam10/acpi_tables.c
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@ -20,6 +20,7 @@
#include <console/console.h> #include <console/console.h>
#include <string.h> #include <string.h>
#include <arch/acpi.h> #include <arch/acpi.h>
#include <arch/ioapic.h>
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
@ -56,8 +57,6 @@ extern const unsigned char AmlCode_ssdt4[];
extern const unsigned char AmlCode_ssdt5[]; extern const unsigned char AmlCode_ssdt5[];
#endif #endif
#define IO_APIC_ADDR 0xfec00000UL
unsigned long acpi_fill_mcfg(unsigned long current) unsigned long acpi_fill_mcfg(unsigned long current)
{ {
/* Just a dummy */ /* Just a dummy */

2
src/mainboard/amd/bimini_fam10/devicetree.cb
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@ -31,7 +31,7 @@ chip northbridge/amd/amdfam10/root_complex
register "gfx_reconfiguration" = "1" register "gfx_reconfiguration" = "1"
register "gfx_link_width" = "0" register "gfx_link_width" = "0"
end end
chip southbridge/amd/cimx_wrapper/sb800 # it is under NB/SB Link, but on the same pri bus chip southbridge/amd/cimx_wrapper/sb800 # it is under NB/SB Link, but on the same pci bus
device pci 11.0 on end # SATA device pci 11.0 on end # SATA
device pci 12.0 on end # USB device pci 12.0 on end # USB
device pci 12.2 on end # USB device pci 12.2 on end # USB