soc/intel: Do CSE sync in romstage, unless ramstage chooses otherwise

This patch makes CSE sync in romstage default enabled unless ramstage
config (SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE) chooses to override it.

TEST=Able to build google/marasov with this change where CSE sync is
performed early inside romstage.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I3f5017fbcf917201eaf8233089050bd31c3d1917
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
This commit is contained in:
Subrata Banik 2023-04-28 00:52:23 +05:30
parent 199728b4d2
commit 792ce81973
1 changed files with 1 additions and 1 deletions

View File

@ -248,7 +248,7 @@ config SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V2
config SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE
bool
default y
default !SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE
depends on SOC_INTEL_CSE_LITE_SKU && !SOC_INTEL_CSE_LITE_COMPRESS_ME_RW
help
Use default flow of CSE FW Update in romstage when uncompressed ME_RW blobs are used.