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Remove some warnings from the tyan s2895. 

Declare superio functions to be static and remove duplicates.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2009-10-30 02:08:07 +00:00
parent 8f6354b6d3
commit 7943fe61df
24 changed files with 81 additions and 107 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/boot/selfboot.c
View File

@ -501,21 +501,21 @@ static int load_self_segments(
memset(middle, 0, end - middle);
}
/* Copy the data that's outside the area that shadows coreboot_ram */
printk_debug("dest %lx, end %lx, bouncebuffer %lx\n", dest, end, bounce_buffer);
printk_debug("dest %p, end %p, bouncebuffer %lx\n", dest, end, bounce_buffer);
if ((unsigned long)end > bounce_buffer) {
if ((unsigned long)dest < bounce_buffer) {
unsigned long from = dest;
unsigned long to = lb_start-(bounce_buffer-(unsigned long)dest);
unsigned char *from = dest;
unsigned char *to = (unsigned char*)(lb_start-(bounce_buffer-(unsigned long)dest));
unsigned long amount = bounce_buffer-(unsigned long)dest;
printk_debug("move prefix around: from %lx, to %lx, amount: %lx\n", from, to, amount);
printk_debug("move prefix around: from %p, to %p, amount: %lx\n", from, to, amount);
memcpy(to, from, amount);
}
if ((unsigned long)end > bounce_buffer + (lb_end - lb_start)) {
unsigned long from = bounce_buffer + (lb_end - lb_start);
unsigned long to = lb_end;
unsigned long amount = end - from;
unsigned long amount = (unsigned long)end - from;
printk_debug("move suffix around: from %lx, to %lx, amount: %lx\n", from, to, amount);
memcpy(to, from, amount);
memcpy((char*)to, (char*)from, amount);
}
}
}

1
src/cpu/amd/model_10xxx/processor_name.c
View File

@ -29,6 +29,7 @@
#include <string.h>
#include <cpu/x86/msr.h>
#include <cpu/cpu.h>
#include <cpu/amd/model_10xxx_rev.h>
extern void wrmsr_amd(u32 index, msr_t msr);

6
src/cpu/amd/model_fxx/model_fxx_init.c
View File

@ -30,6 +30,7 @@
#include <cpu/amd/model_fxx_msr.h>
#if CONFIG_WAIT_BEFORE_CPUS_INIT
void cpus_ready_for_init(void)
{
#if CONFIG_MEM_TRAIN_SEQ == 1
@ -38,7 +39,7 @@ void cpus_ready_for_init(void)
wait_all_core0_mem_trained(sysinfox);
#endif
}
#endif
#if CONFIG_K8_REV_F_SUPPORT == 0
int is_e0_later_in_bsp(int nodeid)
@ -463,13 +464,12 @@ static inline void k8_errata(void)
}
extern void model_fxx_update_microcode(unsigned cpu_deviceid);
int init_processor_name(void);
#if CONFIG_USBDEBUG_DIRECT
static unsigned ehci_debug_addr;
#endif
void model_fxx_init(device_t dev)
static void model_fxx_init(device_t dev)
{
unsigned long i;
msr_t msr;

34
src/cpu/amd/model_fxx/processor_name.c
View File

@ -35,6 +35,7 @@
#include <console/console.h>
#include <string.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/model_fxx_rev.h>
/* The maximum length of CPU names is 48 bytes, including the final NULL byte.
* If you change these names your BIOS will _NOT_ pass the AMD validation and
@ -110,39 +111,6 @@ static inline void wrmsr_amd(unsigned index, msr_t msr)
);
}
static inline unsigned int cpuid_eax(unsigned int op)
{
unsigned int eax;
__asm__("cpuid"
: "=a" (eax)
: "0" (op)
: "ebx", "ecx", "edx");
return eax;
}
static inline unsigned int cpuid_ebx(unsigned int op)
{
unsigned int eax, ebx;
__asm__("cpuid"
: "=a" (eax), "=b" (ebx)
: "0" (op)
: "ecx", "edx" );
return ebx;
}
static inline unsigned int cpuid_ecx(unsigned int op)
{
unsigned int eax, ecx;
__asm__("cpuid"
: "=a" (eax), "=c" (ecx)
: "0" (op)
: "ebx", "edx" );
return ecx;
}
static inline void strcpy(char *dst, const char *src)
{
while (*src) *dst++ = *src++;

10
src/cpu/x86/lapic/lapic_cpu_init.c
View File

@ -448,16 +448,6 @@ static void wait_other_cpus_stop(struct bus *cpu_bus)
#define initialize_other_cpus(root) do {} while(0)
#endif /* CONFIG_SMP */
#if CONFIG_WAIT_BEFORE_CPUS_INIT==0
#define cpus_ready_for_init() do {} while(0)
#else
void cpus_ready_for_init(void);
#endif
#if CONFIG_HAVE_SMI_HANDLER
void smm_init(void);
#endif
void initialize_cpus(struct bus *cpu_bus)
{
struct device_path cpu_path;

2
src/devices/hypertransport.c
View File

@ -613,7 +613,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
*
* @return The maximum bus number found, after scanning all subordinate busses
*/
unsigned int hypertransport_scan_chain_x(struct bus *bus,
static unsigned int hypertransport_scan_chain_x(struct bus *bus,
unsigned min_devfn, unsigned max_devfn, unsigned int max)
{
unsigned ht_unitid_base[4];

2
src/include/cpu/amd/model_10xxx_rev.h
View File

@ -19,4 +19,6 @@
#include <arch/cpu.h>
int init_processor_name(void);
/* place holder for Family 10 revision code */

2
src/include/cpu/amd/model_fxx_rev.h
View File

@ -1,5 +1,7 @@
#include <arch/cpu.h>
int init_processor_name(void);
#if CONFIG_K8_REV_F_SUPPORT == 0
static inline int is_cpu_rev_a0(void)
{

11
src/include/cpu/cpu.h
View File

@ -7,6 +7,17 @@ struct bus;
void cpu_initialize(void);
void initialize_cpus(struct bus *cpu_bus);
void secondary_cpu_init(void);
#if CONFIG_WAIT_BEFORE_CPUS_INIT==0
#define cpus_ready_for_init() do {} while(0)
#else
void cpus_ready_for_init(void);
#endif
#if CONFIG_HAVE_SMI_HANDLER
void smm_init(void);
#endif
#define __cpu_driver __attribute__ ((used,__section__(".rodata.cpu_driver")))
/** start of compile time generated pci driver array */

2
src/include/delay.h
View File

@ -1,6 +1,6 @@
#ifndef DELAY_H
#define DELAY_H
#if !defined( __ROMCC__) && defined (__GNUC__)
#if !defined( __ROMCC__)
void udelay(unsigned usecs);
void mdelay(unsigned msecs);

2
src/northbridge/amd/amdfam10/amdfam10_acpi.c
View File

@ -82,7 +82,7 @@ struct acpi_srat_mem_state {
unsigned long current;
};
void set_srat_mem(void *gp, struct device *dev, struct resource *res)
static void set_srat_mem(void *gp, struct device *dev, struct resource *res)
{
struct acpi_srat_mem_state *state = gp;
unsigned long basek, sizek;

3
src/northbridge/amd/amdk8/amdk8_acpi.c
View File

@ -45,6 +45,7 @@ acknowledgement of AMD's proprietary rights in them.
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdk8_sysconf.h>
#include "amdk8_acpi.h"
//it seems some functions can be moved arch/i386/boot/acpi.c
@ -102,7 +103,7 @@ struct acpi_srat_mem_state {
unsigned long current;
};
void set_srat_mem(void *gp, struct device *dev, struct resource *res)
static void set_srat_mem(void *gp, struct device *dev, struct resource *res)
{
struct acpi_srat_mem_state *state = gp;
unsigned long basek, sizek;

2
src/northbridge/amd/amdk8/raminit.c
View File

@ -1080,7 +1080,7 @@ static unsigned long order_chip_selects(const struct mem_controller *ctrl)
return (tom & ~0xff000000) << 15;
}
unsigned long memory_end_k(const struct mem_controller *ctrl, int max_node_id)
static unsigned long memory_end_k(const struct mem_controller *ctrl, int max_node_id)
{
unsigned node_id;
unsigned end_k;

2
src/northbridge/amd/amdk8/raminit_f.c
View File

@ -1253,7 +1253,7 @@ static unsigned long order_chip_selects(const struct mem_controller *ctrl)
return (tom & ~0xff000000) << (27-10);
}
unsigned long memory_end_k(const struct mem_controller *ctrl, int max_node_id)
static unsigned long memory_end_k(const struct mem_controller *ctrl, int max_node_id)
{
unsigned node_id;
unsigned end_k;

1
src/southbridge/nvidia/ck804/ck804_reset.c
View File

@ -4,6 +4,7 @@
*/
#include <arch/io.h>
#include <part/hard_reset.h>
#define PCI_DEV(BUS, DEV, FN) ( \
(((BUS) & 0xFFF) << 20) | \

6
src/superio/fintek/f71805f/superio.c
View File

@ -60,21 +60,21 @@ static void f71805f_init(device_t dev)
}
}
void f71805f_pnp_set_resources(device_t dev)
static void f71805f_pnp_set_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_resources(dev);
pnp_exit_conf_state(dev);
}
void f71805f_pnp_enable_resources(device_t dev)
static void f71805f_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_enable_resources(dev);
pnp_exit_conf_state(dev);
}
void f71805f_pnp_enable(device_t dev)
static void f71805f_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);

13
src/superio/smsc/lpc47b272/superio.c
View File

@ -38,10 +38,9 @@
// Forward declarations
static void enable_dev(device_t dev);
void lpc47b272_pnp_set_resources(device_t dev);
void lpc47b272_pnp_set_resources(device_t dev);
void lpc47b272_pnp_enable_resources(device_t dev);
void lpc47b272_pnp_enable(device_t dev);
static void lpc47b272_pnp_set_resources(device_t dev);
static void lpc47b272_pnp_enable_resources(device_t dev);
static void lpc47b272_pnp_enable(device_t dev);
static void lpc47b272_init(device_t dev);
static void pnp_enter_conf_state(device_t dev);
@ -96,21 +95,21 @@ static void enable_dev(device_t dev)
// Description: Configure the specified Super I/O device with the resources
// (I/O space, etc.) that have been allocated for it.
//
void lpc47b272_pnp_set_resources(device_t dev)
static void lpc47b272_pnp_set_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_resources(dev);
pnp_exit_conf_state(dev);
}
void lpc47b272_pnp_enable_resources(device_t dev)
static void lpc47b272_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_enable_resources(dev);
pnp_exit_conf_state(dev);
}
void lpc47b272_pnp_enable(device_t dev)
static void lpc47b272_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);

6
src/superio/smsc/lpc47b397/superio.c
View File

@ -74,7 +74,7 @@ static void lpc47b397_init(device_t dev)
}
void lpc47b397_pnp_set_resources(device_t dev)
static void lpc47b397_pnp_set_resources(device_t dev)
{
pnp_enter_conf_state(dev);
@ -89,7 +89,7 @@ void lpc47b397_pnp_set_resources(device_t dev)
}
void lpc47b397_pnp_enable_resources(device_t dev)
static void lpc47b397_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
@ -112,7 +112,7 @@ void lpc47b397_pnp_enable_resources(device_t dev)
}
void lpc47b397_pnp_enable(device_t dev)
static void lpc47b397_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);

13
src/superio/smsc/lpc47m10x/superio.c
View File

@ -37,10 +37,9 @@
// Forward declarations
static void enable_dev(device_t dev);
void lpc47m10x_pnp_set_resources(device_t dev);
void lpc47m10x_pnp_set_resources(device_t dev);
void lpc47m10x_pnp_enable_resources(device_t dev);
void lpc47m10x_pnp_enable(device_t dev);
static void lpc47m10x_pnp_set_resources(device_t dev);
static void lpc47m10x_pnp_enable_resources(device_t dev);
static void lpc47m10x_pnp_enable(device_t dev);
static void lpc47m10x_init(device_t dev);
static void pnp_enter_conf_state(device_t dev);
@ -94,21 +93,21 @@ static void enable_dev(device_t dev)
// Description: Configure the specified Super I/O device with the resources
// (I/O space, etc.) that have been allocated for it.
//
void lpc47m10x_pnp_set_resources(device_t dev)
static void lpc47m10x_pnp_set_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_resources(dev);
pnp_exit_conf_state(dev);
}
void lpc47m10x_pnp_enable_resources(device_t dev)
static void lpc47m10x_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_enable_resources(dev);
pnp_exit_conf_state(dev);
}
void lpc47m10x_pnp_enable(device_t dev)
static void lpc47m10x_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);

12
src/superio/smsc/lpc47m15x/superio.c
View File

@ -34,9 +34,9 @@
// Forward declarations
static void enable_dev(device_t dev);
void lpc47m15x_pnp_set_resources(device_t dev);
void lpc47m15x_pnp_enable_resources(device_t dev);
void lpc47m15x_pnp_enable(device_t dev);
static void lpc47m15x_pnp_set_resources(device_t dev);
static void lpc47m15x_pnp_enable_resources(device_t dev);
static void lpc47m15x_pnp_enable(device_t dev);
static void lpc47m15x_init(device_t dev);
static void pnp_enter_conf_state(device_t dev);
@ -70,21 +70,21 @@ static void enable_dev(device_t dev)
pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
void lpc47m15x_pnp_set_resources(device_t dev)
static void lpc47m15x_pnp_set_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_resources(dev);
pnp_exit_conf_state(dev);
}
void lpc47m15x_pnp_enable_resources(device_t dev)
static void lpc47m15x_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_enable_resources(dev);
pnp_exit_conf_state(dev);
}
void lpc47m15x_pnp_enable(device_t dev)
static void lpc47m15x_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);

28
src/superio/smsc/lpc47n217/superio.c
View File

@ -39,16 +39,16 @@
// Forward declarations
static void enable_dev(device_t dev);
void lpc47n217_pnp_set_resources(device_t dev);
void lpc47n217_pnp_enable_resources(device_t dev);
void lpc47n217_pnp_enable(device_t dev);
static void lpc47n217_pnp_set_resources(device_t dev);
static void lpc47n217_pnp_enable_resources(device_t dev);
static void lpc47n217_pnp_enable(device_t dev);
static void lpc47n217_init(device_t dev);
static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource);
void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase);
void lpc47n217_pnp_set_drq(device_t dev, unsigned drq);
void lpc47n217_pnp_set_irq(device_t dev, unsigned irq);
void lpc47n217_pnp_set_enable(device_t dev, int enable);
static void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase);
static void lpc47n217_pnp_set_drq(device_t dev, unsigned drq);
static void lpc47n217_pnp_set_irq(device_t dev, unsigned irq);
static void lpc47n217_pnp_set_enable(device_t dev, int enable);
static void pnp_enter_conf_state(device_t dev);
static void pnp_exit_conf_state(device_t dev);
@ -98,7 +98,7 @@ static void enable_dev(device_t dev)
// Description: Configure the specified Super I/O device with the resources
// (I/O space, etc.) that have been allocate for it.
//
void lpc47n217_pnp_set_resources(device_t dev)
static void lpc47n217_pnp_set_resources(device_t dev)
{
int i;
@ -114,7 +114,7 @@ void lpc47n217_pnp_set_resources(device_t dev)
pnp_exit_conf_state(dev);
}
void lpc47n217_pnp_enable_resources(device_t dev)
static void lpc47n217_pnp_enable_resources(device_t dev)
{
pnp_enter_conf_state(dev);
@ -125,7 +125,7 @@ void lpc47n217_pnp_enable_resources(device_t dev)
pnp_exit_conf_state(dev);
}
void lpc47n217_pnp_enable(device_t dev)
static void lpc47n217_pnp_enable(device_t dev)
{
pnp_enter_conf_state(dev);
@ -207,7 +207,7 @@ static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource)
report_resource_stored(dev, resource, "");
}
void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
static void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
{
ASSERT(!(iobase & 0x3));
@ -230,7 +230,7 @@ void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
}
}
void lpc47n217_pnp_set_drq(device_t dev, unsigned drq)
static void lpc47n217_pnp_set_drq(device_t dev, unsigned drq)
{
if (dev->path.pnp.device == LPC47N217_PP) {
const uint8_t PP_DMA_MASK = 0x0F;
@ -246,7 +246,7 @@ void lpc47n217_pnp_set_drq(device_t dev, unsigned drq)
}
}
void lpc47n217_pnp_set_irq(device_t dev, unsigned irq)
static void lpc47n217_pnp_set_irq(device_t dev, unsigned irq)
{
uint8_t irq_config_register = 0;
uint8_t irq_config_mask = 0;
@ -282,7 +282,7 @@ void lpc47n217_pnp_set_irq(device_t dev, unsigned irq)
pnp_write_config(dev, irq_config_register, new_config);
}
void lpc47n217_pnp_set_enable(device_t dev, int enable)
static void lpc47n217_pnp_set_enable(device_t dev, int enable)
{
uint8_t power_register = 0;
uint8_t power_mask = 0;

6
src/superio/winbond/w83627dhg/superio.c
View File

@ -64,21 +64,21 @@ static void w83627dhg_init(device_t dev)
}
}
void w83627dhg_pnp_set_resources(device_t dev)
static void w83627dhg_pnp_set_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_set_resources(dev);
pnp_exit_ext_func_mode(dev);
}
void w83627dhg_pnp_enable_resources(device_t dev)
static void w83627dhg_pnp_enable_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_enable_resources(dev);
pnp_exit_ext_func_mode(dev);
}
void w83627dhg_pnp_enable(device_t dev)
static void w83627dhg_pnp_enable(device_t dev)
{
if (!dev->enabled)
return;

6
src/superio/winbond/w83627ehg/superio.c
View File

@ -137,14 +137,14 @@ static void w83627ehg_init(device_t dev)
}
}
void w83627ehg_pnp_set_resources(device_t dev)
static void w83627ehg_pnp_set_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_set_resources(dev);
pnp_exit_ext_func_mode(dev);
}
void w83627ehg_pnp_enable_resources(device_t dev)
static void w83627ehg_pnp_enable_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_enable_resources(dev);
@ -159,7 +159,7 @@ void w83627ehg_pnp_enable_resources(device_t dev)
pnp_exit_ext_func_mode(dev);
}
void w83627ehg_pnp_enable(device_t dev)
static void w83627ehg_pnp_enable(device_t dev)
{
if (!dev->enabled) {
pnp_enter_ext_func_mode(dev);

6
src/superio/winbond/w83627hf/superio.c
View File

@ -129,7 +129,7 @@ static void w83627hf_init(device_t dev)
}
}
void w83627hf_pnp_set_resources(device_t dev)
static void w83627hf_pnp_set_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_set_resources(dev);
@ -137,7 +137,7 @@ void w83627hf_pnp_set_resources(device_t dev)
}
void w83627hf_pnp_enable_resources(device_t dev)
static void w83627hf_pnp_enable_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_enable_resources(dev);
@ -151,7 +151,7 @@ void w83627hf_pnp_enable_resources(device_t dev)
}
void w83627hf_pnp_enable(device_t dev)
static void w83627hf_pnp_enable(device_t dev)
{
if (!dev->enabled) {