diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index 47f03c8973..ccd8d2526d 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -1219,6 +1219,7 @@ void acpi_write_bert(acpi_bert_t *bert, uintptr_t region, size_t length)
 	header->checksum = acpi_checksum((void *)bert, header->length);
 }
 
+__weak void arch_fill_fadt(acpi_fadt_t *fadt) { }
 __weak void soc_fill_fadt(acpi_fadt_t *fadt) { }
 __weak void mainboard_fill_fadt(acpi_fadt_t *fadt) { }
 
@@ -1259,6 +1260,8 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
 	else
 		fadt->preferred_pm_profile = PM_DESKTOP;
 
+	arch_fill_fadt(fadt);
+
 	acpi_fill_fadt(fadt);
 
 	soc_fill_fadt(fadt);
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 61e7edcfb9..00690ba02e 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -235,6 +235,7 @@ $(CONFIG_CBFS_PREFIX)/postcar-compression := none
 
 ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
 
+ramstage-y += acpi.c
 ramstage-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.c
 ramstage-$(CONFIG_ACPI_BERT) += acpi_bert_storage.c
 ramstage-y += boot.c
diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c
new file mode 100644
index 0000000000..0ff0ded9bf
--- /dev/null
+++ b/src/arch/x86/acpi.c
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <cf9_reset.h>
+
+void arch_fill_fadt(acpi_fadt_t *fadt)
+{
+	if (CONFIG(HAVE_CF9_RESET)) {
+		fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
+		fadt->reset_reg.bit_width = 8;
+		fadt->reset_reg.bit_offset = 0;
+		fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
+		fadt->reset_reg.addrl = RST_CNT;
+		fadt->reset_reg.addrh = 0;
+
+		fadt->reset_value = RST_CPU | SYS_RST;
+
+		fadt->flags |= ACPI_FADT_RESET_REGISTER;
+	}
+}
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index 35a1dc348e..6e7db17324 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -880,6 +880,7 @@ void acpi_write_bert(acpi_bert_t *bert, uintptr_t region, size_t length);
 void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt);
 
 void acpi_fill_fadt(acpi_fadt_t *fadt);
+void arch_fill_fadt(acpi_fadt_t *fadt);
 void soc_fill_fadt(acpi_fadt_t *fadt);
 void mainboard_fill_fadt(acpi_fadt_t *fadt);
 
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index 6d5d937ccb..8062cfa098 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -122,24 +122,11 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 				ACPI_FADT_SLEEP_BUTTON |
 				ACPI_FADT_S4_RTC_WAKE |
 				ACPI_FADT_32BIT_TIMER |
-				ACPI_FADT_RESET_REGISTER |
 				ACPI_FADT_PCI_EXPRESS_WAKE |
 				ACPI_FADT_PLATFORM_CLOCK |
 				ACPI_FADT_S4_RTC_VALID |
 				ACPI_FADT_REMOTE_POWER_ON;
 
-	/* Format is from 5.2.3.1: Generic Address Structure */
-	/* reset_reg: see section 4.7.3.6 ACPI 3.0a spec */
-	/* 8 bit write of value 0x06 to 0xCF9 in IO space */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = SYS_RESET;
-	fadt->reset_reg.addrh = 0x0;
-
-	fadt->reset_value = 6;
-
 	fadt->ARM_boot_arch = 0;	/* MUST be 0 ACPI 3.0 */
 	fadt->FADT_MinorVersion = 0;	/* MUST be 0 ACPI 3.0 */
 
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index 7f199ccacb..10e1690852 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -94,24 +94,11 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 				ACPI_FADT_SLEEP_BUTTON |
 				ACPI_FADT_S4_RTC_WAKE |
 				ACPI_FADT_32BIT_TIMER |
-				ACPI_FADT_RESET_REGISTER |
 				ACPI_FADT_PCI_EXPRESS_WAKE |
 				ACPI_FADT_PLATFORM_CLOCK |
 				ACPI_FADT_S4_RTC_VALID |
 				ACPI_FADT_REMOTE_POWER_ON;
 
-	/* Format is from 5.2.3.1: Generic Address Structure */
-	/* reset_reg: see section 4.7.3.6 ACPI 3.0a spec */
-	/* 8 bit write of value 0x06 to 0xCF9 in IO space */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = SYS_RESET;
-	fadt->reset_reg.addrh = 0x0;
-
-	fadt->reset_value = 6;
-
 	fadt->ARM_boot_arch = 0;	/* MUST be 0 ACPI 3.0 */
 	fadt->FADT_MinorVersion = 0;	/* MUST be 0 ACPI 3.0 */
 
diff --git a/src/soc/intel/baytrail/fadt.c b/src/soc/intel/baytrail/fadt.c
index 900805b683..c68d1b7a80 100644
--- a/src/soc/intel/baytrail/fadt.c
+++ b/src/soc/intel/baytrail/fadt.c
@@ -41,16 +41,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE |
-			ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
-
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 6;
+			ACPI_FADT_SEALED_CASE | ACPI_FADT_S4_RTC_WAKE |
+			ACPI_FADT_PLATFORM_CLOCK;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
diff --git a/src/soc/intel/braswell/fadt.c b/src/soc/intel/braswell/fadt.c
index 900805b683..c68d1b7a80 100644
--- a/src/soc/intel/braswell/fadt.c
+++ b/src/soc/intel/braswell/fadt.c
@@ -41,16 +41,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE |
-			ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
-
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 6;
+			ACPI_FADT_SEALED_CASE | ACPI_FADT_S4_RTC_WAKE |
+			ACPI_FADT_PLATFORM_CLOCK;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
diff --git a/src/soc/intel/broadwell/fadt.c b/src/soc/intel/broadwell/fadt.c
index 2a4019db94..ddefe3da9e 100644
--- a/src/soc/intel/broadwell/fadt.c
+++ b/src/soc/intel/broadwell/fadt.c
@@ -40,16 +40,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE |
-			ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
-
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 6;
+			ACPI_FADT_SEALED_CASE | ACPI_FADT_S4_RTC_WAKE |
+			ACPI_FADT_PLATFORM_CLOCK;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index 9f99984aab..7a4e496926 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -119,14 +119,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE |
-			ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
-
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.addrl = RST_CNT;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_value = RST_CPU | SYS_RST;
+			ACPI_FADT_SEALED_CASE | ACPI_FADT_S4_RTC_WAKE |
+			ACPI_FADT_PLATFORM_CLOCK;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index f4204da5ef..1d719ebe51 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -140,17 +140,8 @@ void soc_fill_fadt(acpi_fadt_t *fadt)
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 		       ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
-		       ACPI_FADT_RESET_REGISTER | ACPI_FADT_SLEEP_TYPE |
-		       ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
-
-	/* Reset Register */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xCF9;
-	fadt->reset_reg.addrh = 0x00;
-	fadt->reset_value = 6;
+		       ACPI_FADT_SLEEP_TYPE | ACPI_FADT_S4_RTC_WAKE |
+		       ACPI_FADT_PLATFORM_CLOCK;
 
 	/* PM1 Status & PM1 Enable */
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c
index 44e9f2868b..94ae667081 100644
--- a/src/soc/intel/quark/acpi.c
+++ b/src/soc/intel/quark/acpi.c
@@ -25,7 +25,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	uint32_t pmbase = pci_read_config32(dev, R_QNC_LPC_PM1BLK)
 		& B_QNC_LPC_PM1BLK_MASK;
 
-	fadt->flags |= ACPI_FADT_RESET_REGISTER | ACPI_FADT_PLATFORM_CLOCK;
+	fadt->flags |= ACPI_FADT_PLATFORM_CLOCK;
 
 	/* PM1 Status: ACPI 4.8.3.1.1 */
 	fadt->pm1a_evt_blk = pmbase + R_QNC_PM1BLK_PM1S;
@@ -60,17 +60,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk;
 	fadt->x_pm_tmr_blk.addrh = 0x0;
 
-	/* Reset Register: ACPI 4.8.3.6, 5.2.3.2 */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-
-	/* Soft/Warm Reset */
-	fadt->reset_value = 6;
-
 	/* General-Purpose Event 0 Registers: ACPI 4.8.4.1 */
 	fadt->gpe0_blk = gpe0_base;
 	fadt->gpe0_blk_len = 4 * 2;
diff --git a/src/soc/intel/skylake/fadt.c b/src/soc/intel/skylake/fadt.c
index 0c0ae8db7a..416532e9a7 100644
--- a/src/soc/intel/skylake/fadt.c
+++ b/src/soc/intel/skylake/fadt.c
@@ -46,20 +46,12 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE |
-			ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
+			ACPI_FADT_SEALED_CASE | ACPI_FADT_S4_RTC_WAKE |
+			ACPI_FADT_PLATFORM_CLOCK;
 
 	if (config->s0ix_enable)
 		fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0;
 
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 6;
-
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;
diff --git a/src/soc/intel/xeon_sp/cpx/acpi.c b/src/soc/intel/xeon_sp/cpx/acpi.c
index 1ca3fc6de6..257494a946 100644
--- a/src/soc/intel/xeon_sp/cpx/acpi.c
+++ b/src/soc/intel/xeon_sp/cpx/acpi.c
@@ -297,13 +297,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->day_alrm = 0xd;
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_C2_MP_SUPPORTED |
-			ACPI_FADT_RESET_REGISTER | ACPI_FADT_PLATFORM_CLOCK;
-
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.addrl = RST_CNT;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_value = RST_CPU | SYS_RST;
+			ACPI_FADT_PLATFORM_CLOCK;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c
index 478b8a4174..3cd6ffbffe 100644
--- a/src/soc/intel/xeon_sp/skx/acpi.c
+++ b/src/soc/intel/xeon_sp/skx/acpi.c
@@ -263,17 +263,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 		       ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
-		       ACPI_FADT_RESET_REGISTER | ACPI_FADT_SLEEP_TYPE |
-		       ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
-
-	/* Reset Register */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xCF9;
-	fadt->reset_reg.addrh = 0x00;
-	fadt->reset_value = 6;
+		       ACPI_FADT_SLEEP_TYPE | ACPI_FADT_S4_RTC_WAKE |
+		       ACPI_FADT_PLATFORM_CLOCK;
 
 	/* PM1 Status & PM1 Enable */
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c
index efd0b41cbc..220b327de0 100644
--- a/src/southbridge/amd/agesa/hudson/fadt.c
+++ b/src/southbridge/amd/agesa/hudson/fadt.c
@@ -64,18 +64,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 				ACPI_FADT_S4_RTC_VALID |
 				ACPI_FADT_REMOTE_POWER_ON;
 
-	/* Format is from 5.2.3.1: Generic Address Structure */
-	/* reset_reg: see section 4.7.3.6 ACPI 3.0a spec */
-	/* 8 bit write of value 0x06 to 0xCF9 in IO space */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0x0;
-
-	fadt->reset_value = 6;
-
 	fadt->ARM_boot_arch = 0;	/* MUST be 0 ACPI 3.0 */
 	fadt->FADT_MinorVersion = 0;	/* MUST be 0 ACPI 3.0 */
 
diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c
index a163ff7e02..3868d2461c 100644
--- a/src/southbridge/amd/cimx/sb800/fadt.c
+++ b/src/southbridge/amd/cimx/sb800/fadt.c
@@ -84,22 +84,10 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 				ACPI_FADT_SLEEP_BUTTON |
 				ACPI_FADT_S4_RTC_WAKE |
 				ACPI_FADT_32BIT_TIMER |
-				ACPI_FADT_RESET_REGISTER |
 				ACPI_FADT_PCI_EXPRESS_WAKE |
 				ACPI_FADT_S4_RTC_VALID |
 				ACPI_FADT_REMOTE_POWER_ON;
 
-	/* Format is from 5.2.3.1: Generic Address Structure */
-	/* reset_reg: see section 4.7.3.6 ACPI 3.0a spec */
-	/* 8 bit write of value 0x06 to 0xCF9 in IO space */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0x0;
-	fadt->reset_value = 6;
-
 	fadt->ARM_boot_arch = 0;	/* MUST be 0 ACPI 3.0 */
 	fadt->FADT_MinorVersion = 0;	/* MUST be 0 ACPI 3.0 */
 
diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c
index 2d71b0918a..0b73921e7b 100644
--- a/src/southbridge/amd/pi/hudson/fadt.c
+++ b/src/southbridge/amd/pi/hudson/fadt.c
@@ -58,24 +58,11 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 				ACPI_FADT_SLEEP_BUTTON |
 				ACPI_FADT_S4_RTC_WAKE |
 				ACPI_FADT_32BIT_TIMER |
-				ACPI_FADT_RESET_REGISTER |
 				ACPI_FADT_PCI_EXPRESS_WAKE |
 				ACPI_FADT_PLATFORM_CLOCK |
 				ACPI_FADT_S4_RTC_VALID |
 				ACPI_FADT_REMOTE_POWER_ON;
 
-	/* Format is from 5.2.3.1: Generic Address Structure */
-	/* reset_reg: see section 4.7.3.6 ACPI 3.0a spec */
-	/* 8 bit write of value 0x06 to 0xCF9 in IO space */
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0x0;
-
-	fadt->reset_value = 6;
-
 	fadt->ARM_boot_arch = 0;	/* MUST be 0 ACPI 3.0 */
 	fadt->FADT_MinorVersion = 0;	/* MUST be 0 ACPI 3.0 */
 
diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c
index c7ba5c25ae..1ef939922e 100644
--- a/src/southbridge/intel/bd82x6x/fadt.c
+++ b/src/southbridge/intel/bd82x6x/fadt.c
@@ -50,7 +50,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->flags |= ACPI_FADT_WBINVD |
 			ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_RESET_REGISTER |
 			ACPI_FADT_SEALED_CASE |
 			ACPI_FADT_S4_RTC_WAKE |
 			ACPI_FADT_PLATFORM_CLOCK;
@@ -61,15 +60,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 		fadt->flags |= ACPI_FADT_C2_MP_SUPPORTED;
 	}
 
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-
-	fadt->reset_value = 6;
-
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;
diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c
index 249b22b5bc..05581f43b2 100644
--- a/src/southbridge/intel/i82371eb/fadt.c
+++ b/src/southbridge/intel/i82371eb/fadt.c
@@ -101,15 +101,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	 * 18   FORCE_APIC_CLUSTER_MODEL
 	 * 19   FORCE_APIC_PHYSICAL_DESTINATION_MODE
 	 */
-	fadt->flags |= 0xa5 | ACPI_FADT_RESET_REGISTER;
-
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
+	fadt->flags |= 0xa5;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c
index b2f7d5fff8..7c3f18a0f9 100644
--- a/src/southbridge/intel/i82801dx/fadt.c
+++ b/src/southbridge/intel/i82801dx/fadt.c
@@ -50,16 +50,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_RESET_REGISTER |
-			ACPI_FADT_PLATFORM_CLOCK;
-
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
+			ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
diff --git a/src/southbridge/intel/i82801gx/fadt.c b/src/southbridge/intel/i82801gx/fadt.c
index 11d4aac79d..602f0fe6a9 100644
--- a/src/southbridge/intel/i82801gx/fadt.c
+++ b/src/southbridge/intel/i82801gx/fadt.c
@@ -49,19 +49,10 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES;
 	fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED
 		       | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE
-		       | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_RESET_REGISTER
-		       | ACPI_FADT_C2_MP_SUPPORTED);
+		       | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_C2_MP_SUPPORTED);
 	if (chip->docking_supported)
 		fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;
 
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
-
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;
diff --git a/src/southbridge/intel/i82801ix/fadt.c b/src/southbridge/intel/i82801ix/fadt.c
index 8ea69e8058..3e9ee74025 100644
--- a/src/southbridge/intel/i82801ix/fadt.c
+++ b/src/southbridge/intel/i82801ix/fadt.c
@@ -42,16 +42,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->iapc_boot_arch = ACPI_FADT_LEGACY_FREE;
 	fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
-			ACPI_FADT_DOCKING_SUPPORTED | ACPI_FADT_RESET_REGISTER |
-			ACPI_FADT_PLATFORM_CLOCK;
-
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
+			ACPI_FADT_DOCKING_SUPPORTED | ACPI_FADT_PLATFORM_CLOCK;
 
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c
index ac2ba76b70..bbb82cc1d4 100644
--- a/src/southbridge/intel/i82801jx/fadt.c
+++ b/src/southbridge/intel/i82801jx/fadt.c
@@ -45,19 +45,10 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES;
 	fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED
 		       | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE
-		       | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_RESET_REGISTER
-		       | ACPI_FADT_C2_MP_SUPPORTED);
+		       | ACPI_FADT_PLATFORM_CLOCK | ACPI_FADT_C2_MP_SUPPORTED);
 	if (chip->docking_supported)
 		fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;
 
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-	fadt->reset_value = 0x06;
-
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;
diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c
index 93c95b5692..87adcb34d2 100644
--- a/src/southbridge/intel/ibexpeak/fadt.c
+++ b/src/southbridge/intel/ibexpeak/fadt.c
@@ -50,7 +50,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	fadt->flags |= ACPI_FADT_WBINVD |
 			ACPI_FADT_C1_SUPPORTED |
 			ACPI_FADT_SLEEP_BUTTON |
-			ACPI_FADT_RESET_REGISTER |
 			ACPI_FADT_S4_RTC_WAKE |
 			ACPI_FADT_PLATFORM_CLOCK;
 	if (chip->docking_supported) {
@@ -60,15 +59,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 		fadt->flags |= ACPI_FADT_C2_MP_SUPPORTED;
 	}
 
-	fadt->reset_reg.space_id = 1;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-
-	fadt->reset_value = 6;
-
 	fadt->x_pm1a_evt_blk.space_id = 1;
 	fadt->x_pm1a_evt_blk.bit_width = 32;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;
diff --git a/src/southbridge/intel/lynxpoint/fadt.c b/src/southbridge/intel/lynxpoint/fadt.c
index 2868b5f943..9ae6d34d3c 100644
--- a/src/southbridge/intel/lynxpoint/fadt.c
+++ b/src/southbridge/intel/lynxpoint/fadt.c
@@ -57,7 +57,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 		       ACPI_FADT_C1_SUPPORTED |
 		       ACPI_FADT_C2_MP_SUPPORTED |
 		       ACPI_FADT_SLEEP_BUTTON |
-		       ACPI_FADT_RESET_REGISTER |
 		       ACPI_FADT_SEALED_CASE |
 		       ACPI_FADT_S4_RTC_WAKE |
 		       ACPI_FADT_PLATFORM_CLOCK;
@@ -65,15 +64,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 	if (cfg->docking_supported)
 		fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;
 
-	fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO;
-	fadt->reset_reg.bit_width = 8;
-	fadt->reset_reg.bit_offset = 0;
-	fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
-	fadt->reset_reg.addrl = 0xcf9;
-	fadt->reset_reg.addrh = 0;
-
-	fadt->reset_value = 6;
-
 	fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
 	fadt->x_pm1a_evt_blk.bit_width = 2 * 16;
 	fadt->x_pm1a_evt_blk.bit_offset = 0;