lenovo/x2[23]0: Handle Ricoh SD cardreader
Change-Id: Id0aecbd3e45bdf9661168ebd0e55f17dc6febaaa Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7203 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
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@ -39,3 +39,4 @@ source src/drivers/trident/Kconfig
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source src/drivers/uart/Kconfig
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source src/drivers/usb/Kconfig
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source src/drivers/xpowers/Kconfig
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source src/drivers/ricoh/rce822/Kconfig
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@ -38,3 +38,4 @@ subdirs-y += ipmi
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subdirs-y += elog
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subdirs-y += xpowers
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subdirs-$(CONFIG_ARCH_X86) += pc80
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subdirs-y += ricoh/rce822
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@ -0,0 +1,3 @@
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config DRIVERS_RICOH_RCE822
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bool
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default n
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@ -0,0 +1 @@
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ramstage-$(CONFIG_DRIVERS_RICOH_RCE822) += rce822.c
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@ -0,0 +1,29 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Vladimir Serbinenko
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef DRIVERS_RICOH_RC822_CHIP_H
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#define DRIVERS_RICOH_RC822_CHIP_H
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struct drivers_ricoh_rce822_config {
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u8 sdwppol:1;
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u8 disable_mask;
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};
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#endif
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@ -0,0 +1,79 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Vladimir Serbinenko
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <kconfig.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <arch/io.h>
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#include "chip.h"
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static void rce822_enable(struct device *dev)
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{
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struct drivers_ricoh_rce822_config *config = dev->chip_info;
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pci_write_config8(dev, 0xca, 0x57);
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pci_write_config8(dev, 0xcb, config->disable_mask);
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pci_write_config8(dev, 0xca, 0x00);
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}
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static void rce822_init(struct device *dev)
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{
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struct drivers_ricoh_rce822_config *config = dev->chip_info;
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pci_write_config8(dev, 0xf9, 0xfc);
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pci_write_config8(dev, 0xfb, config->sdwppol << 1);
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pci_write_config8(dev, 0xf9, 0x00);
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}
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static void rce822_set_subsystem(device_t dev, unsigned vendor, unsigned device)
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{
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if (!vendor || !device) {
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pci_write_config32(dev, 0xac,
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pci_read_config32(dev, PCI_VENDOR_ID));
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} else {
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pci_write_config32(dev, 0xac,
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((device & 0xffff) << 16) | (vendor & 0xffff));
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}
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}
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static struct pci_operations lops_pci = {
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.set_subsystem = &rce822_set_subsystem,
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};
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static struct device_operations usb_ehci_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = rce822_init,
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.enable = rce822_enable,
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.scan_bus = 0,
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.ops_pci = &lops_pci,
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};
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static const unsigned short pci_device_ids[] = { 0xe822, 0xe823, 0 };
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static const struct pci_driver pch_usb_ehci __pci_driver = {
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.ops = &usb_ehci_ops,
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.vendor = PCI_VENDOR_ID_RICOH,
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.devices = pci_device_ids,
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};
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@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
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select SANDYBRIDGE_LVDS
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select DRIVERS_RICOH_RCE822
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# Workaround for EC/KBC IRQ1.
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select SERIRQ_CONTINUOUS_MODE
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@ -106,11 +106,12 @@ chip northbridge/intel/sandybridge
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end # PCIe Port #4
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device pci 1c.4 on
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subsystemid 0x17aa 0x21db
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device pci 00.0 on
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subsystemid 0x17aa 0x21db
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end
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device pci 00.1 on
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subsystemid 0x17aa 0x21db
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chip drivers/ricoh/rce822
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register "sdwppol" = "1"
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register "disable_mask" = "0x87"
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device pci 00.0 on
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subsystemid 0x17aa 0x21fa
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end
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end
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end # PCIe Port #5 (SD)
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device pci 1c.5 off end # PCIe Port #6
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@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
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select IVYBRIDGE_LVDS
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select DRIVERS_RICOH_RCE822
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# Workaround for EC/KBC IRQ1.
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select SERIRQ_CONTINUOUS_MODE
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@ -97,11 +97,12 @@ chip northbridge/intel/sandybridge
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end # High Definition Audio
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device pci 1c.0 on
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subsystemid 0x17aa 0x21fa
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device pci 00.0 on
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subsystemid 0x17aa 0x21fa
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end
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device pci 00.1 on
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subsystemid 0x17aa 0x21fa
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chip drivers/ricoh/rce822
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register "sdwppol" = "1"
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register "disable_mask" = "0x87"
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device pci 00.0 on
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subsystemid 0x17aa 0x21fa
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end
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end
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end # PCIe Port #1
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device pci 1c.1 on
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