mainboard: Trivial - drop trailing blank lines at EOF

Change-Id: I05d6d22664155ac8478e665733f816776e277c22
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6200
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/mainboard/amd/dinar/buildOpts.c

@@ -551,5 +551,3 @@ UINT8 SizeOfTableHy = sizeof (AGESA_MEM_TABLE_HY) / sizeof (AGESA_MEM_TABLE_HY[0
 //  /* platform code to read an SPD...  */
 //  return Status;
 //}
-
-

src/mainboard/amd/dinar/rd890_cfg.c

@@ -271,4 +271,3 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON
 	}
 #endif
 }
-

src/mainboard/amd/dinar/romstage.c

@@ -137,4 +137,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	post_code(0x45);  // Should never see this post code.
 }
-

src/mainboard/amd/dinar/sb700_cfg.c

@@ -142,4 +142,3 @@ void sb700_cimx_config(AMDSBCFG *sb_config)
 #endif //!__PRE_RAM__
 	printk(BIOS_DEBUG, "SB700 - Cfg.c - %s - End.\n", __func__);
 }
-

src/mainboard/amd/inagua/PlatformGnbPcie.c

@@ -140,4 +140,3 @@ OemCustomizeInitEarly (
 	InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr;
 	InitEarly->GnbConfig.PsppPolicy      = 0;
 }
-

src/mainboard/amd/mahogany_fam10/resourcemap.c

@@ -278,4 +278,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/amd/persimmon/buildOpts.c

@@ -454,5 +454,3 @@ CONST UINT8 SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABL
 //	/* platform code to read an SPD...	*/
 //	return Status;
 //}
-
-

src/mainboard/amd/rumba/mainboard.c

@@ -35,4 +35,3 @@ static void mainboard_enable(struct device *dev)
 struct chip_operations mainboard_ops = {
         .enable_dev = mainboard_enable,
 };
-

src/mainboard/amd/serengeti_cheetah/acpi_tables.c

@@ -275,4 +275,3 @@ unsigned long write_acpi_tables(unsigned long start)
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }
-

src/mainboard/amd/serengeti_cheetah/resourcemap.c

@@ -261,4 +261,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c

@@ -299,4 +299,3 @@ unsigned long write_acpi_tables(unsigned long start)
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }
-

src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c

@@ -278,4 +278,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/amd/south_station/PlatformGnbPcie.c

@@ -148,4 +148,3 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
   InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr;
   InitEarly->GnbConfig.PsppPolicy      = 0;
 }
-

src/mainboard/amd/south_station/buildOpts.c

@@ -454,5 +454,3 @@ CONST UINT8 SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABL
 //  /* platform code to read an SPD...  */
 //  return Status;
 //}
-
-

src/mainboard/amd/south_station/romstage.c

@@ -119,4 +119,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	post_code(0x54);  /* Should never see this post code. */
 }
-

src/mainboard/amd/tilapia_fam10/resourcemap.c

@@ -278,4 +278,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/amd/torpedo/PlatformGnbPcie.c

@@ -171,4 +171,3 @@ OemCustomizeInitEarly (
   InitEarly->GnbConfig.PcieComplexList = LlanoPcieComplexListPtr;
   InitEarly->GnbConfig.PsppPolicy      = 0;
 }
-

src/mainboard/amd/torpedo/buildOpts.c

@@ -383,5 +383,3 @@ UINT8 SizeOfTableLN = sizeof (AGESA_MEM_TABLE_LN) / sizeof (AGESA_MEM_TABLE_LN[0
 //  /* platform code to read an SPD...  */
 //  return Status;
 //}
-
-

src/mainboard/amd/union_station/PlatformGnbPcie.c

@@ -150,4 +150,3 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
   InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr;
   InitEarly->GnbConfig.PsppPolicy      = 0;
 }
-

src/mainboard/amd/union_station/buildOpts.c

@@ -454,5 +454,3 @@ CONST UINT8 SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABL
 //  /* platform code to read an SPD...  */
 //  return Status;
 //}
-
-

src/mainboard/amd/union_station/romstage.c

@@ -113,4 +113,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	post_code(0x54);  /* Should never see this post code. */
 }
-

src/mainboard/aopen/dxplplusu/acpi_tables.c

@@ -160,4 +160,3 @@ unsigned long write_acpi_tables(unsigned long start)
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }
-

src/mainboard/arima/hdama/mptable.c

@@ -260,4 +260,3 @@ unsigned long write_smp_table(unsigned long addr)
 	v = smp_write_floating_table(addr, 0);
 	return (unsigned long)smp_write_config_table(v);
 }
-

src/mainboard/asrock/e350m1/PlatformGnbPcie.c

@@ -150,4 +150,3 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
   InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr;
   InitEarly->GnbConfig.PsppPolicy      = 0;
 }
-

src/mainboard/asrock/e350m1/buildOpts.c

@@ -454,5 +454,3 @@ CONST UINT8 SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABL
 //  /* platform code to read an SPD...  */
 //  return Status;
 //}
-
-

src/mainboard/asus/dsbf/mainboard.c

@@ -34,4 +34,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/asus/k8v-x/mainboard.c

@@ -57,4 +57,3 @@ u32 vt8237_ide_80pin_detect(struct device *dev)
 
 	return res;
 }
-

src/mainboard/asus/m2v/mainboard.c

@@ -53,4 +53,3 @@ u32 vt8237_ide_80pin_detect(struct device *dev)
 
 	return res;
 }
-

src/mainboard/asus/m4a78-em/resourcemap.c

@@ -278,4 +278,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/asus/m4a785-m/resourcemap.c

@@ -278,4 +278,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/bifferos/bifferboard/romstage.c

@@ -60,4 +60,3 @@ static void main(void)
 	/* Route Cseg, Dseg, Eseg and Fseg to RAM */
 	pci_write_config32(PCI_DEV(0,0,0), 0x84, 0x3ffffff0);
 }
-

src/mainboard/broadcom/blast/resourcemap.c

@@ -262,4 +262,3 @@ static void setup_blast_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/digitallogic/msm586seg/mainboard.c

@@ -131,4 +131,3 @@ static void mainboard_enable(struct device *dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/digitallogic/msm800sev/mainboard.c

@@ -34,4 +34,3 @@ static void mainboard_enable(struct device *dev)
 struct chip_operations mainboard_ops = {
         .enable_dev = mainboard_enable,
 };
-

src/mainboard/emulation/qemu-armv7/mainboard.c

@@ -24,4 +24,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/getac/p470/ec_oem.c

@@ -127,4 +127,3 @@ int ec_oem_dump_status(void)
 
 	return ec_sc;
 }
-

src/mainboard/getac/p470/irq_tables.c

@@ -60,4 +60,3 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 {
 	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
 }
-

src/mainboard/getac/p470/mainboard.c

@@ -99,4 +99,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/getac/p470/smihandler.c

@@ -199,4 +199,3 @@ void mainboard_smi_gpi(u32 gpi_sts)
 		printk(BIOS_DEBUG, "EC SMI source: %02x\n", source);
 	}
 }
-

src/mainboard/gigabyte/ga_2761gxdk/resourcemap.c

@@ -280,4 +280,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/gigabyte/m57sli/resourcemap.c

@@ -280,4 +280,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/gigabyte/ma785gm/resourcemap.c

@@ -278,4 +278,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/gigabyte/ma785gmt/resourcemap.c

@@ -278,4 +278,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/gigabyte/ma78gm/resourcemap.c

@@ -278,4 +278,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/gizmosphere/gizmo/buildOpts.c

@@ -466,5 +466,3 @@ CONST UINT8 SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABL
 //	/* platform code to read an SPD...	*/
 //	return Status;
 //}
-
-

src/mainboard/google/bolt/mainboard.c

@@ -199,4 +199,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/google/falco/mainboard.c

@@ -199,4 +199,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/google/link/intel_dp.c

@@ -164,4 +164,3 @@ intel_dp_aux_ch(u32 ch_ctl, u32 ch_data, u32 *send, int send_bytes,
 
 	return recv_bytes;
 }
-

src/mainboard/google/peppy/mainboard.c

@@ -199,4 +199,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/google/pit/wakeup.c

@@ -26,4 +26,3 @@ int wakeup_need_reset(void)
 	 * reset if the TPM reset mask GPIO value is high. */
 	return gpio_get_value(GPIO_X06);
 }
-

src/mainboard/google/rambi/chromeos.c

@@ -99,4 +99,3 @@ int get_write_protect_state(void)
 	/* WP is enabled when the pin is reading high. */
 	return ssus_get_gpio(WP_STATUS_PAD);
 }
-

src/mainboard/google/rambi/mainboard.c

@@ -176,4 +176,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/google/slippy/i915io.c

@@ -262,4 +262,3 @@ void runio(struct intel_dp *dp)
 	io_i915_write32(0x00000000,DEIIR);
 	io_i915_write32(0x00001800,0x4f044);
 }
-

src/mainboard/google/slippy/mainboard.c

@@ -199,4 +199,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/google/snow/wakeup.c

@@ -26,4 +26,3 @@ int wakeup_need_reset(void)
 	 * reset if GPIO value is high. */
 	return gpio_get_value(GPIO_Y10);
 }
-

src/mainboard/hp/dl145_g1/resourcemap.c

@@ -266,4 +266,3 @@ static void setup_dl145g1_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/hp/dl145_g3/irq_tables.c

@@ -56,4 +56,3 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 {
         return copy_pirq_routing_table(addr, &intel_irq_routing_table);
 }
-

src/mainboard/ibm/e325/mptable.c

@@ -129,4 +129,3 @@ unsigned long write_smp_table(unsigned long addr)
 	v = smp_write_floating_table(addr, 0);
 	return (unsigned long)smp_write_config_table(v);
 }
-

src/mainboard/ibm/e326/mptable.c

@@ -128,4 +128,3 @@ unsigned long write_smp_table(unsigned long addr)
 	v = smp_write_floating_table(addr, 0);
 	return (unsigned long)smp_write_config_table(v);
 }
-

src/mainboard/iei/kino-780am2-fam10/resourcemap.c

@@ -278,4 +278,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/intel/baskingridge/chromeos.c

@@ -124,4 +124,3 @@ int get_write_protect_state(void)
 {
 	return 0;
 }
-

src/mainboard/intel/baskingridge/mainboard.c

@@ -154,4 +154,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/intel/cougar_canyon2/mainboard.c

@@ -166,4 +166,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/intel/cougar_canyon2/romstage.c

@@ -358,4 +358,3 @@ void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
 	/* No overrides needed */
 	return;
 }
-

src/mainboard/intel/d945gclf/irq_tables.c

@@ -58,4 +58,3 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 {
 	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
 }
-

src/mainboard/intel/d945gclf/smihandler.c

@@ -47,5 +47,3 @@ int mainboard_io_trap_handler(int smif)
 	//gnvs->smif = 0;
 	return 1;
 }
-
-

src/mainboard/intel/emeraldlake2/chromeos.c

@@ -112,4 +112,3 @@ int get_recovery_mode_switch(void)
 	/* Recovery: GPIO22, active low */
 	return !((gp_lvl >> 22) & 1);
 }
-

src/mainboard/intel/emeraldlake2/mainboard.c

@@ -166,4 +166,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/intel/jarrell/irq_tables.c

@@ -40,4 +40,3 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 {
 	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
 }
-

src/mainboard/intel/jarrell/jarrell_fixups.c

@@ -114,4 +114,3 @@ static void mainboard_set_e7520_leds(void)
 
 	return;
 }
-

src/mainboard/intel/jarrell/mptable.c

@@ -236,4 +236,3 @@ unsigned long write_smp_table(unsigned long addr)
 	v = smp_write_floating_table(addr, 0);
 	return (unsigned long)smp_write_config_table(v);
 }
-

src/mainboard/intel/mtarvon/irq_tables.c

@@ -41,4 +41,3 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 {
 	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
 }
-

src/mainboard/intel/mtarvon/mptable.c

@@ -109,4 +109,3 @@ unsigned long write_smp_table(unsigned long addr)
 	v = smp_write_floating_table(addr, 0);
 	return (unsigned long)smp_write_config_table(v);
 }
-

src/mainboard/intel/truxton/irq_tables.c

@@ -41,4 +41,3 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 {
 	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
 }
-

src/mainboard/intel/truxton/mptable.c

@@ -137,4 +137,3 @@ unsigned long write_smp_table(unsigned long addr)
 	v = smp_write_floating_table(addr, 0);
 	return (unsigned long)smp_write_config_table(v);
 }
-

src/mainboard/intel/wtm2/chromeos.c

@@ -64,4 +64,3 @@ int get_write_protect_state(void)
 {
 	return 0;
 }
-

src/mainboard/intel/wtm2/graphics.c

@@ -85,5 +85,3 @@ void graphics_register_reset(u32 aux_ctl, u32 aux_data, int verbose)
 	/* end not yet documented. */
 	io_i915_write32(0x10000000,SDEISR+0x30);
 }
-
-

src/mainboard/intel/wtm2/mainboard.c

@@ -154,4 +154,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/intel/xe7501devkit/acpi_tables.c

@@ -134,4 +134,3 @@ unsigned long write_acpi_tables(unsigned long start)
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }
-

src/mainboard/iwill/dk8_htx/acpi_tables.c

@@ -285,4 +285,3 @@ unsigned long write_acpi_tables(unsigned long start)
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }
-

src/mainboard/iwill/dk8_htx/resourcemap.c

@@ -261,4 +261,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/iwill/dk8s2/mptable.c

@@ -162,4 +162,3 @@ unsigned long write_smp_table(unsigned long addr)
 	v = smp_write_floating_table(addr, 0);
 	return (unsigned long)smp_write_config_table(v);
 }
-

src/mainboard/iwill/dk8x/mptable.c

@@ -162,4 +162,3 @@ unsigned long write_smp_table(unsigned long addr)
 	v = smp_write_floating_table(addr, 0);
 	return (unsigned long)smp_write_config_table(v);
 }
-

src/mainboard/jetway/pa78vm5/resourcemap.c

@@ -279,4 +279,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/kontron/986lcd-m/irq_tables.c

@@ -58,4 +58,3 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 {
 	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
 }
-

src/mainboard/kontron/986lcd-m/mainboard.c

@@ -232,4 +232,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/kontron/986lcd-m/smihandler.c

@@ -47,5 +47,3 @@ int mainboard_io_trap_handler(int smif)
 	//gnvs->smif = 0;
 	return 1;
 }
-
-

src/mainboard/lenovo/t60/mainboard.c

@@ -152,4 +152,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/lenovo/t60/smihandler.c

@@ -195,4 +195,3 @@ int mainboard_smi_apmc(u8 data)
 	}
 	return 0;
 }
-

src/mainboard/lenovo/x60/mainboard.c

@@ -168,4 +168,3 @@ static void mainboard_enable(device_t dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/lippert/frontrunner-af/buildOpts.c

@@ -455,5 +455,3 @@ CONST UINT8 SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABL
 //	/* platform code to read an SPD...	*/
 //	return Status;
 //}
-
-

src/mainboard/lippert/toucan-af/buildOpts.c

@@ -455,5 +455,3 @@ CONST UINT8 SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABL
 //	/* platform code to read an SPD...	*/
 //	return Status;
 //}
-
-

src/mainboard/msi/ms9185/resourcemap.c

@@ -288,4 +288,3 @@ static void setup_ms9185_resource_map(void)
        max = ARRAY_SIZE(register_values);
        setup_resource_map(register_values, max);
 }
-

src/mainboard/msi/ms9282/resourcemap.c

@@ -296,4 +296,3 @@ static void setup_ms9282_resource_map(void)
        max = ARRAY_SIZE(register_values);
        setup_resource_map(register_values, max);
 }
-

src/mainboard/msi/ms9652_fam10/resourcemap.c

@@ -284,4 +284,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/newisys/khepri/mptable.c

@@ -163,4 +163,3 @@ unsigned long write_smp_table(unsigned long addr)
 	v = smp_write_floating_table(addr, 0);
 	return (unsigned long)smp_write_config_table(v);
 }
-

src/mainboard/newisys/khepri/resourcemap.c

@@ -268,4 +268,3 @@ static void setup_khepri_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/nvidia/l1_2pvv/resourcemap.c

@@ -280,4 +280,3 @@ static void setup_mb_resource_map(void)
 	max = ARRAY_SIZE(register_values);
 	setup_resource_map(register_values, max);
 }
-

src/mainboard/pcengines/alix1c/mainboard.c

@@ -34,4 +34,3 @@ static void mainboard_enable(struct device *dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-

src/mainboard/pcengines/alix2d/mainboard.c

@@ -34,4 +34,3 @@ static void mainboard_enable(struct device *dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
-