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util/inteltool: Add PCIEXBAR and PXPEPBAR reading for Skylake 

Both registers behave the same as on the previous generation

Taken from
 * 6th Generation Intel Processor Families for S-Platform
     Volume 2 of 2
 * Page 55 and 62
 * 332688-003EN

Change-Id: Id02a38a7ab51003c9d0f16ebb2300a16b66a15f9
Signed-off-by: Maximilian Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/22350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Maximilian Schander 2017-11-05 06:14:55 +01:00 committed by Nico Huber
parent 98c11ddc9e
commit 798564333d
1 changed files with 4 additions and 0 deletions
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4
util/inteltool/pcie.c
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@ -263,6 +263,8 @@ int print_epbar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_E3:
case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32;
break;
@ -484,6 +486,8 @@ int print_pciexbar(struct pci_dev *nb)
case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_E3:
case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
pciexbar_reg = pci_read_long(nb, 0x60);
pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32;
break;