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util/superiotool: add support for Nuvoton NCT6796D 

Registers and default values taken from public datasheet:
https://www.nuvoton.com/resource-files/NCT6796D_Datasheet_V0_6.pdf

TEST=build/dump SIO registers on Erying SRMJ4 mainboard

Change-Id: I0ff940a17b0c38a5ca66e90dd4e075a2b04dcfc1
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80003
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2024-01-15 16:05:50 -06:00 committed by Felix Held
parent 00e9c91ff7
commit 79b548cf3b
1 changed files with 59 additions and 0 deletions
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59
util/superiotool/nuvoton.c
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@ -736,6 +736,65 @@ static const struct superio_registers reg_table[] = {
{0x30,0xe0,0xe1,0xe2,0xe3,EOT}, {0x30,0xe0,0xe1,0xe2,0xe3,EOT},
{0x20,0x20,0x04,0x05,0x01,EOT}}, {0x20,0x20,0x04,0x05,0x01,EOT}},
{EOT}}}, {EOT}}},
{0xd42a, "NCT6796D", {
{NOLDN, NULL,
{0x07,0x10,0x11,0x13,0x14,0x1a,0x1b,0x1c,0x1d,0x20,0x21,0x22,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,0x2c,0x2d,0x2f,EOT},
{0x00,0xff,0xff,0x00,0x00,0x30,0x18,0x00,0x00,0xd4,0x21,0xff,0x04,0x00,MISC,0x03,0x00,0xc0,0x00,0x01,0x00,MISC,EOT}},
{0x01, "Parallel Port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x00,0x03,0x78,0x07,0x04,0x3f,EOT}},
{0x02, "UART A",
{0x30,0x60,0x61,0x70,0xf0,0xf2,EOT},
{0x01,0x03,0xf8,0x04,0x00,0x00,EOT}},
{0x03, "UART B",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x00,0x00,EOT}},
{0x05, "Keyboard Controller",
{0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x43,EOT}},
{0x06, "Consumer IR",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x07, "GPIO 6, GPIO 7, GPIO 8",
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xec,0xed,0xf4,0xf5,0xf6,0xf7,0xf8,EOT},
{0x00,0xff,0x00,0x00,0x00,0xff,0x00,0x00,0x00,0x00,0x00,0xff,0x00,0x00,0x00,0x00,EOT}},
{0x08, "WDT1, WDT3, GPIO 0, GPIO 1",
{0x30,0x60,0x61,0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfe,0xff,EOT},
{0x00,0x00,0x00,0xff,0x00,0x00,0x00,0x00,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0x09, "GPIO 2, GPIO 3, GPIO 4, GPIO 5",
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe9,0xea,0xeb,0xf0,0xf1,0xf2,0xe8,0xee,0xf4,0xf5,0xf6,0xf7,EOT},
{0x00,0xff,0x00,0x00,0x00,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0x00,0x00,0x00,0x00,0xff,0x00,0x00,0x00,EOT}},
{0x0a, "ACPI",
{0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe9,0xec,0xed,0xee,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xfc,0xfe,EOT},
{0x01,0x00,0x00,0x00,0x00,0x02,0x1a,0x00,0x00,0x00,0x01,0x00,0x10,0x5e,0x00,0x00,0x00,0x00,0xc0,0x80,0x00,EOT}},
{0x0b, "Hardware Monitor, Front Panel LED",
{0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xed,0xf0,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,EOT},
{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x99,0x99,0x99,0x99,0x99,0xa8,0x00,0xff,0x81,0x00,0x10,0x00,0x87,0x47,0x00,0x00,EOT}},
{0x0d, "BCLK, WDT2, WDT_MEM",
{0xe1,0xe2,0xe3,0xe7,0xf0,0xf3,EOT},
{0x00,0x01,0xff,0x10,0x00,0x00,EOT}},
{0x0e, "CIR Wake-Up",
{0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf6,0xf7,0xf8,0xf9,0xfa,EOT},
{0x00,0x00,0x00,0x00,0x02,0x1f,0x00,0x17,0x0b,0x00,0x07,0x00,EOT}},
{0x0f, "GPIO Push-Pull or Open-Drain selection",
{0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe9,0xf0,0xf1,0xf2,EOT},
{0xff,0xff,0xff,0xff,0xff,0xff,0x0f,0xff,0xff,0x9d,0x04,0x00,EOT}},
{0x11, "PGPIO, RI PSOUT Wake-Up",
{0xe0,0xe1,0xe2,0xee,EOT},
{0x08,0x00,0x00,0x00,EOT}},
{0x12, "LED control",
{0xe0,0xe4,0xe5,0xe6,0xe7,0xea,0xeb,0xec,0xed,0xef,EOT},
{0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x40,EOT}},
{0x14, "Port 80 UART",
{0xe0,0xe1,0xe2,0xe3,0xe4,EOT},
{0x80,0x00,0x00,0x10,0x00,EOT}},
{0x15, "LED Control 2",
{0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,EOT},
{0xff,0x7f,0x00,0x06,0x05,0x17,0x00,0x0f,0x10,0x06,0x05,EOT}},
{0x16, "Deep Sleep",
{0x30,0xe0,0xe1,0xe2,0xe3,0xf3,0xf4,0xf5,0xf8,EOT},
{0xa0,0x20,0x04,0x05,0x01,0x80,0x01,0x00,0x20,EOT}},
{EOT}}},
{0xd451, "NCT6797D (experimental)", { {0xd451, "NCT6797D (experimental)", {
{NOLDN, NULL, {NOLDN, NULL,
{0x07,0x10,0x11,0x13,0x14,0x1a,0x1b,0x1c,0x1d,0x20,0x21,0x22,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,0x2c,0x2d,0x2f,EOT}, {0x07,0x10,0x11,0x13,0x14,0x1a,0x1b,0x1c,0x1d,0x20,0x21,0x22,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,0x2c,0x2d,0x2f,EOT},