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mb/google/brya/var/kinox: Update the DPTF parameters 

Follow the Thermal_paramters_list-0520.xlsx to modify DPTF baseline PL1
values.

1. Modify baseline PL1 min_power from 15000 to 12000.
2. Modify baseline PL1 max_power from 17000 to 25000.

BUG=b:231380286
TEST=emerge-brask coreboot

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Ibd3098ee6bbf964cffddfcc9a4600cb7d81162d9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64595
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Ricky Chang <rickytlchang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Dtrain Hsu 2022-05-23 17:43:07 +08:00 committed by Felix Held
parent 236ad4c5c6
commit 79df32d083
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/brya/variants/kinox/overridetree.cb
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@ -144,8 +144,8 @@ chip soc/intel/alderlake
register "controls.power_limits" = "{ register "controls.power_limits" = "{
.pl1 = { .pl1 = {
.min_power = 15000, .min_power = 12000,
.max_power = 17000, .max_power = 25000,
.time_window_min = 28 * MSECS_PER_SEC, .time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 28 * MSECS_PER_SEC, .time_window_max = 28 * MSECS_PER_SEC,
.granularity = 500, .granularity = 500,