soc/amd/stoneyridge: Fix and clean lpc.c
Rename set_lpc_resource to set_child_resource. Fix EC child resource not recognized as already set. Remove code that's not needed. BUG=b:62200877 Change-Id: I6e2bf9f8214b5f660084ccd622e3fe2c0cba7656 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/22093 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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@ -1,7 +1,7 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Advanced Micro Devices, Inc.
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* Copyright (C) 2010-2017 Advanced Micro Devices, Inc.
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* Copyright (C) 2014 Sage Electronic Engineering, LLC
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*
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* This program is free software; you can redistribute it and/or modify
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@ -158,20 +158,62 @@ static void lpc_set_resources(struct device *dev)
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pci_dev_set_resources(dev);
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}
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static void set_lpc_resource(device_t child,
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int *variable_num,
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/*
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* Structure to simplify code obtaining the total of used wide IO
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* registers and the size assigned to each. Used on set_child_resource
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* and lpc_enable_childrens_resources.
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*/
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struct _wide_IO_enable_bits {
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u32 enable[3];
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u8 alt[3];
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} wio_en = {
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{
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LPC_WIDEIO0_ENABLE,
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LPC_WIDEIO1_ENABLE,
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LPC_WIDEIO2_ENABLE
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},
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{
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LPC_ALT_WIDEIO0_ENABLE,
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LPC_ALT_WIDEIO1_ENABLE,
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LPC_ALT_WIDEIO2_ENABLE
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}
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};
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static void set_child_resource(device_t child,
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int *wio_total_ptr,
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u16 *reg_var,
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u32 *reg,
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u32 *reg_x,
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u16 reg_size,
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u8 *wiosize)
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{
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struct resource *res;
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u32 base, end;
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u32 rsize = 0, set = 0, set_x = 0;
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u16 var_num;
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int i, wio_total = *wio_total_ptr;
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u16 reg_size[3];
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/*
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* Be a bit relaxed, tolerate that LPC region might be bigger than
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* resource we try to fit, do it like this for all regions < 16 bytes.
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* If there is a resource > 16 bytes it must be 512 bytes to be able
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* to allocate the fresh LPC window.
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*
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* AGESA and early initialization can set a wide IO port. This code
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* will verify if required region was previously set and will avoid
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* setting a new wide IO resource if one is already set.
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*/
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/*
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* For each wideIO get the current size, 16, 512,
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* or 0 if it isn't used.
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*/
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for (i = 0; i < 3; i++) {
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if (i < wio_total) /* convert to index */
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reg_size[i] = (*wiosize & wio_en.alt[i]) ? 16 : 512;
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else
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reg_size[i] = 0;
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}
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var_num = *variable_num;
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for (res = child->resource_list; res; res = res->next) {
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if (!(res->flags & IORESOURCE_IO))
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continue;
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@ -247,37 +289,32 @@ static void set_lpc_resource(device_t child,
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break;
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default:
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rsize = 0;
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/* try AGESA allocated region in region 0 */
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if ((var_num > 0) && ((base >= reg_var[0]) &&
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((base + res->size) <= (reg_var[0] + reg_size))))
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rsize = reg_size;
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if (wio_total > 0) {
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for (i = 0; i < wio_total; i++) {
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if ((base >= reg_var[i]) &&
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((base + res->size) <=
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(reg_var[i] + reg_size[i]))) {
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rsize = reg_size[i];
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printk(BIOS_DEBUG,
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"Covered by wideIO");
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printk(BIOS_DEBUG, " %d\n", i);
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break;
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}
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}
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}
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}
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/* check if region found and matches the enable */
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if (res->size <= rsize) {
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*reg |= set;
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*reg_x |= set_x;
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/* check if we can fit resource in variable range */
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} else if ((var_num < 3) &&
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((res->size <= 16) || (res->size == 512))) {
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/* use variable ranges if pre-defined do not match */
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switch (var_num) {
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case 0:
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*reg_x |= LPC_WIDEIO0_ENABLE;
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if (res->size <= 16)
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*wiosize |= LPC_ALT_WIDEIO0_ENABLE;
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break;
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case 1:
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*reg_x |= LPC_WIDEIO1_ENABLE;
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if (res->size <= 16)
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*wiosize |= LPC_ALT_WIDEIO1_ENABLE;
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break;
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case 2:
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*reg_x |= LPC_WIDEIO2_ENABLE;
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if (res->size <= 16)
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*wiosize |= LPC_ALT_WIDEIO2_ENABLE;
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break;
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}
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reg_var[var_num++] = base & 0xffff;
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} else if ((wio_total < 3) && (res->size <= 512)) {
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reg_var[wio_total] = base;
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*reg_x |= wio_en.enable[i];
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if (res->size <= 16)
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*wiosize |= wio_en.alt[wio_total];
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wio_total++;
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*wio_total_ptr = wio_total;
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} else {
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printk(BIOS_ERR,
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"cannot fit LPC decode region:");
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@ -285,7 +322,6 @@ static void set_lpc_resource(device_t child,
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dev_path(child), base, end);
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}
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}
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*variable_num = var_num;
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}
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/**
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@ -298,38 +334,21 @@ static void lpc_enable_childrens_resources(device_t dev)
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{
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struct bus *link;
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u32 reg, reg_x;
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int var_num = 0;
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int i, wio_total = 0;
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u16 reg_var[3];
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u16 reg_size[1] = {512};
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u8 wiosize = pci_read_config8(dev, LPC_ALT_WIDEIO_RANGE_ENABLE);
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/*
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* Be a bit relaxed, tolerate that LPC region might be bigger than
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* resource we try to fit, do it like this for all regions < 16 bytes.
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* If there is a resource > 16 bytes it must be 512 bytes to be able
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* to allocate the fresh LPC window.
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*
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* AGESA likes to enable already one LPC region in wide port base
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* 0x64-0x65, using DFLT_SIO_PME_BASE_ADDRESS, 512 bytes size
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* The code tries to check if resource can fit into this region.
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*/
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reg = pci_read_config32(dev, LPC_IO_PORT_DECODE_ENABLE);
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reg_x = pci_read_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE);
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/* check if ranges are free and don't use them if already taken */
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if (reg_x & LPC_WIDEIO0_ENABLE)
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var_num = 1;
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/* just in case check if someone did not manually set other ranges */
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if (reg_x & LPC_WIDEIO1_ENABLE)
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var_num = 2;
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if (reg_x & LPC_WIDEIO2_ENABLE)
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var_num = 3;
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/* check AGESA region size */
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if (wiosize & LPC_ALT_WIDEIO0_ENABLE)
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reg_size[0] = 16;
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/*
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* Detect the number of used ranges (wide IO), and don't use those
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* already taken.
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*/
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for (i = 0; i < 3; i++) {
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if (reg_x & wio_en.enable[i])
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wio_total = i + 1;
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}
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reg_var[2] = pci_read_config16(dev, LPC_WIDEIO2_GENERIC_PORT);
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reg_var[1] = pci_read_config16(dev, LPC_WIDEIO1_GENERIC_PORT);
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@ -342,12 +361,11 @@ static void lpc_enable_childrens_resources(device_t dev)
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child = child->sibling) {
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if (child->enabled
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&& (child->path.type == DEVICE_PATH_PNP)) {
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set_lpc_resource(child,
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&var_num,
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set_child_resource(child,
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&wio_total,
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reg_var,
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®,
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®_x,
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reg_size[0],
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&wiosize);
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}
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}
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@ -355,7 +373,7 @@ static void lpc_enable_childrens_resources(device_t dev)
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pci_write_config32(dev, LPC_IO_PORT_DECODE_ENABLE, reg);
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pci_write_config32(dev, LPC_IO_OR_MEM_DECODE_ENABLE, reg_x);
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/* Set WideIO for as many IOs found (fall through is on purpose) */
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switch (var_num) {
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switch (wio_total) {
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case 3:
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pci_write_config16(dev, LPC_WIDEIO2_GENERIC_PORT, reg_var[2]);
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/* fall through */
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