From 7a4c02145d2bfd3779eb56f0a09f03e799f1dc33 Mon Sep 17 00:00:00 2001
From: Martin Roth <martinroth@google.com>
Date: Sun, 23 Jul 2017 21:05:24 -0600
Subject: [PATCH] src/include: Add guards on all header files

Change-Id: I2d7d4e0b25f2cf3eef2040f89d5ebc711909cdd7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20734
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
---
 src/include/cpu/amd/model_10xxx_rev.h | 5 +++++
 src/include/cpu/amd/model_fxx_rev.h   | 4 ++++
 src/include/cpu/amd/sc520.h           | 6 ++++++
 src/include/cpu/x86/post_code.h       | 4 ++++
 src/include/device/pci_ids.h          | 5 +++++
 src/include/spd_ddr2.h                | 5 +++++
 src/include/sys/types.h               | 5 +++++
 7 files changed, 34 insertions(+)

diff --git a/src/include/cpu/amd/model_10xxx_rev.h b/src/include/cpu/amd/model_10xxx_rev.h
index 7f07e9843b..c6fa8f66bb 100644
--- a/src/include/cpu/amd/model_10xxx_rev.h
+++ b/src/include/cpu/amd/model_10xxx_rev.h
@@ -13,8 +13,13 @@
  * GNU General Public License for more details.
  */
 
+#ifndef __CPU_AMD_MODEL_10XXX_REV_H__
+#define __CPU_AMD_MODEL_10XXX_REV_H__
+
 #include <arch/cpu.h>
 
 int init_processor_name(void);
 
 /* place holder for Family 10 revision code */
+
+#endif /* __CPU_AMD_MODEL_10XXX_REV_H__ */
diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h
index 828e51a529..6fb6194137 100644
--- a/src/include/cpu/amd/model_fxx_rev.h
+++ b/src/include/cpu/amd/model_fxx_rev.h
@@ -1,3 +1,6 @@
+#ifndef __CPU_AMD_MODEL_FXX_REV_H__
+#define __CPU_AMD_MODEL_FXX_REV_H__
+
 #include <arch/cpu.h>
 #include <arch/io.h>
 
@@ -125,3 +128,4 @@ int is_e0_later_in_bsp(int nodeid);
 int is_cpu_f0_in_bsp(int nodeid);
 
 #endif
+#endif /* __CPU_AMD_MODEL_FXX_REV_H__ */
diff --git a/src/include/cpu/amd/sc520.h b/src/include/cpu/amd/sc520.h
index 4e748be530..a0390adc04 100644
--- a/src/include/cpu/amd/sc520.h
+++ b/src/include/cpu/amd/sc520.h
@@ -1,4 +1,8 @@
+#ifndef __CPU_AMD_SC520_H__
+#define __CPU_AMD_SC520_H__
+
 /* handy dandy stuff for the sc520 MMCR */
+
 /* default location of the MMCR */
 #define MMCR 0xfffef000
 
@@ -309,3 +313,5 @@ struct mmcr {
 
 
 #define MMCRDEFAULT ((struct mmcr *) 0xfffef000)
+
+#endif /* __CPU_AMD_SC520_H__ */
diff --git a/src/include/cpu/x86/post_code.h b/src/include/cpu/x86/post_code.h
index cd3d1599ed..5f968b75fb 100644
--- a/src/include/cpu/x86/post_code.h
+++ b/src/include/cpu/x86/post_code.h
@@ -1,3 +1,5 @@
+#ifndef __X86_POST_CODE_H__
+#define __X86_POST_CODE_H__
 
 #include <console/post_codes.h>
 
@@ -10,3 +12,5 @@
 #else
 #define post_code(value)
 #endif
+
+#endif /* __X86_POST_CODE_H__ */
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 9887b68062..07b66d18a4 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -1,3 +1,6 @@
+#ifndef __DEVICE_PCI_IDS_H__
+#define __DEVICE_PCI_IDS_H__
+
 /*
  *	PCI Class, Vendor and Device IDs
  *
@@ -3078,3 +3081,5 @@
 #define PCI_DEVICE_ID_AMD_VIPER_7412    0x7412
 
 /* END OLDER USAGE */
+
+#endif /* __DEVICE_PCI_IDS_H__ */
diff --git a/src/include/spd_ddr2.h b/src/include/spd_ddr2.h
index 848cc5d421..724c996b59 100644
--- a/src/include/spd_ddr2.h
+++ b/src/include/spd_ddr2.h
@@ -14,6 +14,9 @@
  * GNU General Public License for more details.
  */
 
+#ifndef __SPD_DDR2_H__
+#define __SPD_DDR2_H__
+
 /* SPDs for DDR2 SDRAM */
 #define SPD_MEM_TYPE	2
 	#define SPD_MEM_TYPE_SDRAM_DDR	0x07
@@ -111,3 +114,5 @@
 #define SPD_TRFC	42
 
 #define SPD_TREF	12
+
+#endif /* __SPD_DDR2_H__ */
diff --git a/src/include/sys/types.h b/src/include/sys/types.h
index fa95d570b0..69968dd3ed 100644
--- a/src/include/sys/types.h
+++ b/src/include/sys/types.h
@@ -1 +1,6 @@
+#ifndef __SYS_TYPES_H__
+#define __SYS_TYPES_H__
+
 #include "../types.h"
+
+#endif /* __SYS_TYPES_H__ */