GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

src/mainboard/{foxconn/d41s,intel/d510mo}: Use pci_or_config 

The pci_or_configx function makes the code shorter and more readable.

Change-Id: Ic1ba250f8ac9fb75cf3252aec18af80842bda7dd
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans 2019-04-12 20:10:45 +02:00 committed by Patrick Georgi
parent 6f5225c7e0
commit 7a50554e29
2 changed files with 2 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/foxconn/d41s/romstage.c
View File

@ -28,8 +28,7 @@ void mb_enable_lpc(void)
/* Disable Serial IRQ */
pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0xd0);
/* Decode range */
pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC,
pci_read_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC) | 0x0010);
pci_or_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, 0x0010);
pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN | KBC_LPC_EN
| FDD_LPC_EN | LPT_LPC_EN | COMB_LPC_EN
| COMA_LPC_EN);

3
src/mainboard/intel/d510mo/romstage.c
View File

@ -28,8 +28,7 @@ void mb_enable_lpc(void)
/* Disable Serial IRQ */
pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0x00);
/* Decode range */
pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC,
pci_read_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC) | 0x0010);
pci_or_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, 0x0010);
pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN
| CNF2_LPC_EN | KBC_LPC_EN | COMA_LPC_EN
| COMB_LPC_EN);