The Winbond Super I/O chips have another indirection of registers. The
hwmon has generic registers and banked registers, mostly temperature handling, and SMI/GPIO stuff. Not all LDNs are switched via register offset 0x07, make it a parameter. Add support for dumping the hardware monitor of Winbond W83627THF/THG parts with the -e option. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -95,7 +95,7 @@ void probe_idregs_ali(uint16_t port)
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get_superio_name(reg_table, id), id, rev, port);
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chip_found = 1;
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dump_superio("ALi", reg_table, port, id);
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dump_superio("ALi", reg_table, port, id, LDN_SEL);
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exit_conf_mode_ali(port);
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}
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@ -137,7 +137,7 @@ void probe_idregs_fintek(uint16_t port)
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get_superio_name(reg_table, did), vid, did, port);
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chip_found = 1;
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dump_superio("Fintek", reg_table, port, did);
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dump_superio("Fintek", reg_table, port, did, LDN_SEL);
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exit_conf_mode_winbond_fintek_ite_8787(port);
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}
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@ -534,10 +534,10 @@ static void probe_idregs_ite_helper(const char *init, uint16_t port)
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get_superio_name(reg_table, id), id, chipver, port);
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chip_found = 1;
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dump_superio("ITE", reg_table, port, id);
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dump_superio("ITE", reg_table, port, id, LDN_SEL);
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if (extra_dump) {
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regwrite(port, 0x07, 0x04); /* Select LDN 4 (EC). */
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regwrite(port, LDN_SEL, 0x04); /* Select LDN 4 (EC). */
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/* Get EC base address (stored in LDN 4, index 0x60/0x61). */
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ecport = regval(port, 0x60) << 8;
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@ -547,7 +547,7 @@ static void probe_idregs_ite_helper(const char *init, uint16_t port)
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ecport += 5;
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printf("Environment controller (0x%04x)\n", ecport);
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dump_superio("ITE-EC", ec_table, ecport, id);
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dump_superio("ITE-EC", ec_table, ecport, id, LDN_SEL);
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}
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}
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@ -583,5 +583,5 @@ void probe_idregs_ite(uint16_t port)
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void print_ite_chips(void)
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{
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print_vendor_chips("ITE", reg_table);
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print_vendor_chips("ITE EC", ec_table);
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print_vendor_chips("ITE-EC", ec_table);
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}
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@ -506,7 +506,7 @@ void probe_idregs_nsc(uint16_t port)
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get_superio_name(reg_table, id), id, rev, port);
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chip_found = 1;
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dump_superio("NSC", reg_table, port, id);
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dump_superio("NSC", reg_table, port, id, LDN_SEL);
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}
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void print_nsc_chips(void)
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@ -643,7 +643,8 @@ static void probe_idregs_smsc_helper(uint16_t port, uint8_t idreg,
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id, rev, port);
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chip_found = 1;
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dump_superio((id == 0x77 ? "ASUS" : "SMSC"), reg_table, port, id);
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dump_superio((id == 0x77 ? "ASUS" : "SMSC"), reg_table, port, id,
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LDN_SEL);
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exit_conf_mode_smsc(port);
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}
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@ -82,7 +82,7 @@ const char *get_superio_name(const struct superio_registers reg_table[],
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}
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static void dump_regs(const struct superio_registers reg_table[],
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int i, int j, uint16_t port)
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int i, int j, uint16_t port, uint8_t ldn_sel)
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{
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int k;
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const int16_t *idx;
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@ -91,7 +91,7 @@ static void dump_regs(const struct superio_registers reg_table[],
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printf("LDN 0x%02x", reg_table[i].ldn[j].ldn);
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if (reg_table[i].ldn[j].name != NULL)
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printf(" (%s)", reg_table[i].ldn[j].name);
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regwrite(port, 0x07, reg_table[i].ldn[j].ldn);
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regwrite(port, ldn_sel, reg_table[i].ldn[j].ldn);
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} else {
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printf("Register dump:");
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}
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@ -131,7 +131,7 @@ static void dump_regs(const struct superio_registers reg_table[],
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void dump_superio(const char *vendor,
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const struct superio_registers reg_table[],
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uint16_t port, uint16_t id)
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uint16_t port, uint16_t id, uint8_t ldn_sel)
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{
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int i, j, no_dump_available = 1;
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@ -149,7 +149,7 @@ void dump_superio(const char *vendor,
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if (reg_table[i].ldn[j].ldn == EOT)
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break;
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no_dump_available = 0;
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dump_regs(reg_table, i, j, port);
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dump_regs(reg_table, i, j, port, ldn_sel);
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}
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if (no_dump_available)
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@ -73,10 +73,14 @@ and print its vendor, name, ID, revision, and config port.\n"
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#define MISC -5 /* Needs special comment in output */
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#define MAXLDN 0x14 /* Biggest LDN */
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#define LDNSIZE (MAXLDN + 3) /* Biggest LDN + 0 + NOLDN + EOT */
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#define MAXNUMIDX 170 /* Maximum number of indexes */
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#define MAXNUMIDX 170 /* Maximum number of indices */
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#define IDXSIZE (MAXNUMIDX + 1)
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#define MAXNUMPORTS (6 + 1) /* Maximum number of Super I/O ports */
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/* Select registers for various components. */
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#define LDN_SEL 0x07 /* LDN select register */
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#define WINBOND_HWM_SEL 0x4e /* Hardware monitor bank select */
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/* Command line parameters. */
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extern int dump, verbose, extra_dump;
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@ -102,7 +106,7 @@ int superio_unknown(const struct superio_registers reg_table[], uint16_t id);
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const char *get_superio_name(const struct superio_registers reg_table[],
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uint16_t id);
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void dump_superio(const char *name, const struct superio_registers reg_table[],
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uint16_t port, uint16_t id);
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uint16_t port, uint16_t id, uint8_t ldn_sel);
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void probing_for(const char *vendor, const char *info, uint16_t port);
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void print_vendor_chips(const char *vendor,
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const struct superio_registers reg_table[]);
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@ -468,6 +468,55 @@ static const struct superio_registers reg_table[] = {
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{EOT}
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};
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static const struct superio_registers hwm_table[] = {
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{0x828, "W83627THF/THG", {
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{NOLDN, NULL,
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{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
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0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,
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0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,
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0x1e,0x1f,
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0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
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0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,0x32,0x33,0x34,
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0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,
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0x3f,
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0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,0x48,0x49,
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0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,EOT},
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{RSVD,0xff,RSVD,0xff,0x00,0x00,0x00,0x00,0x01,0x01,
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0x01,0x01,0x3c,0x3c,0x0a,0x0a,RSVD,0xff,0x00,0x00,
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0x00,0x01,0x01,0x3c,0x43,RSVD,0xff,0xff,RSVD,RSVD,
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NANA,NANA,
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NANA,NANA,NANA,NANA,NANA,RSVD,RSVD,NANA,NANA,NANA,
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NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
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RSVD,RSVD,RSVD,RSVD,NANA,NANA,NANA,NANA,NANA,RSVD,
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RSVD,
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0x03,0x00,0x00,0xfe,0xff,RSVD,RSVD,0x5f,NANA,0x03,
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RSVD,0x44,0x18,0x15,0x80,0x5c,EOT}},
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{0x0, "Bank 0",
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{0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,0x58,0x59,
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0x5d,0x5e,0x5f,EOT},
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{NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x80,0x90,0x70,
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0x00,RSVD,RSVD,EOT}},
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{0x1, "Bank 1",
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{0x50,0x51,0x52,0x53,0x54,0x55,0x56,EOT},
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{NANA,NANA,0x00,0x4b,0x00,0x50,0x00,EOT}},
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{0x2, "Bank 2",
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{0x50,0x51,0x52,0x53,0x54,0x55,0x56,EOT},
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{NANA,NANA,0x00,0x4b,0x00,0x50,0x00,EOT}},
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{0x4, "Bank 4",
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{0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x59,0x5a,
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0x5b,EOT},
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{0x00,0xff,RSVD,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,EOT}},
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{0x5, "Bank 5",
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{0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,EOT},
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{NANA,NANA,RSVD,RSVD,NANA,NANA,NANA,NANA,EOT}},
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{0x6, "Bank 6",
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{0x50,EOT},
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{RSVD,EOT}},
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{EOT}}},
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{EOT}
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};
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static void enter_conf_mode_winbond_88(uint16_t port)
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{
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OUTB(0x88, port);
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@ -486,7 +535,7 @@ static void enter_conf_mode_winbond_86(uint16_t port)
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static void probe_idregs_winbond_helper(const char *init, uint16_t port)
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{
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uint16_t id;
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uint16_t id, hwmport;
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uint8_t devid, rev, olddevid;
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probing_for("Winbond", init, port);
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get_superio_name(reg_table, id), devid, rev, port);
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chip_found = 1;
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dump_superio("Winbond", reg_table, port, id);
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dump_superio("Winbond", reg_table, port, id, LDN_SEL);
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if (extra_dump) {
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regwrite(port, LDN_SEL, 0x0b); /* Select LDN 0xb (HWM). */
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if ((regval(port, 0x30) & (1 << 0)) != (1 << 0)) {
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printf("Hardware Monitor disabled or does not exist.\n");
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return;
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}
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/* Get HWM base address (stored in LDN 0xb, index 0x60/0x61). */
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hwmport = regval(port, 0x60) << 8;
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hwmport |= regval(port, 0x61);
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/* HWM address register = HWM base address + 5. */
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hwmport += 5;
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printf("Hardware monitor (0x%04x)\n", hwmport);
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dump_superio("Winbond-HWM", hwm_table, hwmport, id,
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WINBOND_HWM_SEL);
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}
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}
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void probe_idregs_winbond(uint16_t port)
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@ -547,4 +616,5 @@ void probe_idregs_winbond(uint16_t port)
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void print_winbond_chips(void)
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{
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print_vendor_chips("Winbond", reg_table);
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print_vendor_chips("Winbond-HWM", hwm_table);
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}
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