GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/nissa/var/anraggar: Fix Type-C & DP functions 

Due to TCPC0 & TCPC1 exchanged compare to Neried design,
but related USB2 Ports not exchanged.

BUG=b:304920262
TEST=Tpye-C & DP functions workable

Change-Id: I9dacf06b1e672575a684856acdb10b6c88360b18
Signed-off-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79165
Reviewed-by: Dolan Liu <liuyong5@huaqin.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Weimin Wu 2023-11-18 12:19:46 +08:00 committed by Felix Held
parent 10db713100
commit 7ac0b43671
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/mainboard/google/brya/variants/anraggar/overridetree.cb
View File

@ -366,8 +366,8 @@ chip soc/intel/alderlake
end
device ref pch_espi on
chip ec/google/chromeec
use conn0 as mux_conn[0]
use conn1 as mux_conn[1]
use conn0 as mux_conn[1]
use conn1 as mux_conn[0]
device pnp 0c09.0 on end
end
end
@ -375,12 +375,12 @@ chip soc/intel/alderlake
chip drivers/intel/pmc_mux
device generic 0 on
chip drivers/intel/pmc_mux/conn
use usb2_port1 as usb2_port
use usb2_port2 as usb2_port
use tcss_usb3_port1 as usb3_port
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
use usb2_port2 as usb2_port
use usb2_port1 as usb2_port
use tcss_usb3_port2 as usb3_port
device generic 1 alias conn1 on end
end