From 7af90247be608ddb79b689e0bfded3caf1c11d07 Mon Sep 17 00:00:00 2001 From: Karthikeyan Ramasubramanian Date: Wed, 13 Oct 2021 17:14:51 -0600 Subject: [PATCH] mb/google/guybrush: Fix variant_has_pcie_wwan helper variant_has_pcie_wwan helper returns true if gpp_bridge_2 PCIe engine is enabled. On some variants, this engine is used by storage controllers. Fix it by adding a weak override that returns no PCIe WWAN by default. BUG=None TEST=Build and boot to OS in Guybrush. Ensure that PCIe WWAN is enumerated on boards where it is stuffed. Change-Id: I07b9dd8fc5c8c3e1557f9268c1176d4a3cade1af Signed-off-by: Karthikeyan Ramasubramanian Reviewed-on: https://review.coreboot.org/c/coreboot/+/58311 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- .../google/guybrush/variants/baseboard/helpers.c | 7 ++----- .../google/guybrush/variants/guybrush/Makefile.inc | 5 +++++ .../google/guybrush/variants/guybrush/variant.c | 9 +++++++++ 3 files changed, 16 insertions(+), 5 deletions(-) create mode 100644 src/mainboard/google/guybrush/variants/guybrush/variant.c diff --git a/src/mainboard/google/guybrush/variants/baseboard/helpers.c b/src/mainboard/google/guybrush/variants/baseboard/helpers.c index 881c556f70..248e7a98ab 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/helpers.c +++ b/src/mainboard/google/guybrush/variants/baseboard/helpers.c @@ -2,9 +2,6 @@ #include #include -#include -#include -#include WEAK_DEV_PTR(fpmcu); @@ -13,7 +10,7 @@ bool variant_has_fpmcu(void) return is_dev_enabled(DEV_PTR(fpmcu)); } -bool variant_has_pcie_wwan(void) +bool __weak variant_has_pcie_wwan(void) { - return is_dev_enabled(DEV_PTR(gpp_bridge_2)); + return false; } diff --git a/src/mainboard/google/guybrush/variants/guybrush/Makefile.inc b/src/mainboard/google/guybrush/variants/guybrush/Makefile.inc index f7c97bafbf..d8a1beaf8f 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/Makefile.inc +++ b/src/mainboard/google/guybrush/variants/guybrush/Makefile.inc @@ -1,7 +1,12 @@ # SPDX-License-Identifier: GPL-2.0-or-later bootblock-y += gpio.c +bootblock-y += variant.c + romstage-y += gpio.c +romstage-y += variant.c + ramstage-y += gpio.c +ramstage-y += variant.c subdirs-y += ./memory diff --git a/src/mainboard/google/guybrush/variants/guybrush/variant.c b/src/mainboard/google/guybrush/variants/guybrush/variant.c new file mode 100644 index 0000000000..cde24cb9c0 --- /dev/null +++ b/src/mainboard/google/guybrush/variants/guybrush/variant.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include + +bool variant_has_pcie_wwan(void) +{ + return is_dev_enabled(DEV_PTR(gpp_bridge_2)); +}