amd/pi/hudson: Add SPI definitions to header

Add defines that will be used later for setting the fastest settings
in the SPI controller.

Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit 0d2c28b8156dcc1f3dc925b3c3ba15b6b07f202c)

Change-Id: I660cc9ed6910c33042321c80453c7f74912455d9
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/18441
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Marshall Dawson 2017-01-29 17:29:46 -07:00 committed by Marc Jones
parent d8019a67bf
commit 7b0b9f0d41
1 changed files with 38 additions and 0 deletions

View File

@ -86,6 +86,44 @@
#define DECODE_ENABLE_ACPIUC_PORT BIT(30) #define DECODE_ENABLE_ACPIUC_PORT BIT(30)
#define DECODE_ENABLE_ADLIB_PORT BIT(31) #define DECODE_ENABLE_ADLIB_PORT BIT(31)
#define SPI_CNTRL0 0x00
#define SPI_READ_MODE_MASK (BIT(30) | BIT(29) | BIT(18))
/* Nominal is 16.7MHz on older devices, 33MHz on newer */
#define SPI_READ_MODE_NOM 0x00000000
#define SPI_READ_MODE_DUAL112 ( BIT(29) )
#define SPI_READ_MODE_QUAD114 ( BIT(29) | BIT(18))
#define SPI_READ_MODE_DUAL122 (BIT(30) )
#define SPI_READ_MODE_QUAD144 (BIT(30) | BIT(18))
#define SPI_READ_MODE_NORMAL66 (BIT(30) | BIT(29) )
/* Nominal and SPI_READ_MODE_FAST_HUDSON1 are the only valid choices for H1 */
#define SPI_READ_MODE_FAST_HUDSON1 ( BIT(18))
#define SPI_READ_MODE_FAST (BIT(30) | BIT(29) | BIT(18))
#define SPI_ARB_ENABLE BIT(19)
#define SPI_CNTRL1 0x0c
/* Use SPI_SPEED_16M-SPI_SPEED_66M below for hudson and bolton */
#define SPI_CNTRL1_SPEED_MASK (BIT(15) | BIT(14) | BIT(13) | BIT(12))
#define SPI_NORM_SPEED_SH 12
#define SPI_FAST_SPEED_SH 8
#define SPI100_ENABLE 0x20
#define SPI_USE_SPI100 BIT(0)
#define SPI100_SPEED_CONFIG 0x22
#define SPI_SPEED_66M (0x0)
#define SPI_SPEED_33M ( BIT(0))
#define SPI_SPEED_22M ( BIT(1) )
#define SPI_SPEED_16M ( BIT(1) | BIT(0))
#define SPI_SPEED_100M (BIT(2) )
#define SPI_SPEED_800K (BIT(2) | BIT(0))
#define SPI_NORM_SPEED_NEW_SH 12
#define SPI_FAST_SPEED_NEW_SH 8
#define SPI_ALT_SPEED_NEW_SH 4
#define SPI_TPM_SPEED_NEW_SH 0
#define SPI100_HOST_PREF_CONFIG 0x2c
#define SPI_RD4DW_EN_HOST BIT(15)
static inline int hudson_sata_enable(void) static inline int hudson_sata_enable(void)
{ {
/* True if IDE or AHCI. */ /* True if IDE or AHCI. */