GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/brya/var/anahera: Adjust I2C5 timing for touchpad 

Adjust scl_lcnt, scl_hcnt, sda_hold value for I2C5 to meet
touchpad SPEC.

BUG=b:260540852
BRANCH=firmware-brya-14505.B
TEST=build, checked TP function work normally,
and measure the timing meet SPEC
tLOW  ~1.72 us
tHIGH ~0.63 us
tHD   ~0.69 us
fscl  383 kHz

Change-Id: I9036a604a90558911c4f8a492db9f1f0f28bf404
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Wisley Chen 2022-11-29 12:22:43 +06:00 committed by Eric Lai
parent cab2c53e3c
commit 7b1e7c30a7
1 changed files with 6 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/mainboard/google/brya/variants/anahera/overridetree.cb
View File

@ -66,7 +66,12 @@ chip soc/intel/alderlake
.speed = I2C_SPEED_FAST, .speed = I2C_SPEED_FAST,
.rise_time_ns = 650, .rise_time_ns = 650,
.fall_time_ns = 400, .fall_time_ns = 400,
.data_hold_time_ns = 50, .speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 170,
.scl_hcnt = 70,
.sda_hold = 40,
}
}, },
}" }"
register "tcc_offset" = "3" # TCC of 97C register "tcc_offset" = "3" # TCC of 97C